Parasitic Modeling Using Common Device Profile
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Solution Overview
Problem
Foundries face challenges in sharing process information for new microchip features with customers and software companies while protecting sensitive information, leading to accuracy gaps and potential disclosure of proprietary data.
Innovation Solution
Implementing a process development flow that uses a real 3D profile for parasitic modeling, generating a fake MEOL profile for external sharing, and integrating a field solver with the characterization tool to maintain accuracy and secrecy, eliminating the need for effective profile fitting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the foundry shares accurate process information with customers, then customers can develop products effectively, but the foundry risks disclosing sensitive proprietary information
Solution Approach 1:
The patent introduces an intermediary process that transforms sensitive process information into a protected format. A characterization tool generates device profiles from process information, and a field solver computes parasitic parameters using these profiles. This intermediary transformation allows accurate parasitic extraction while preventing direct access to the underlying sensitive process information, effectively mediating between accuracy needs and information protection requirements.
Solution Approach 2:
The patent creates a virtual copy of the device structure through generated device profiles that capture essential geometric characteristics without revealing the actual process information. These profiles serve as accurate replicas for parasitic extraction purposes while being decoupled from the sensitive source data, enabling customers to work with accurate models without accessing proprietary process details.
2Adaptability or versatility
If the foundry shares process information with the RCX tool software company, then the tool can be improved, but the foundry may inadvertently aid competitors and disclose sensitive information
Solution Approach 1:
The patent establishes an intermediary characterization tool that acts as a buffer between the foundry's process information and the RCX tool software company. The characterization tool transforms process information into device profiles and parasitic parameters through field solver computations, allowing the RCX tool to be improved with accurate data while the foundry never directly shares sensitive process information with the software company or its other customers.
Solution Approach 2:
The patent segments the information flow into distinct stages: process information is first transformed into device profiles by a characterization tool, then used by a field solver to compute parasitic parameters, and finally applied by the RCX tool. This segmentation ensures that sensitive process information remains isolated in the foundry's environment while still enabling tool improvement through indirect data sharing.
3Loss of information
If the foundry uses effective profile fitting to protect sensitive information, then proprietary data is protected, but an accuracy gap is introduced
Solution Approach 1:
The patent replaces the mechanical approximation approach of effective profile fitting with a physics-based field solver computation. Instead of manually fitting simplified profiles that compromise accuracy, the system uses electromagnetic field theory to compute parasitic parameters directly from device profiles, eliminating the need for accuracy-compromising fitting while maintaining information protection through the characterization tool intermediary.
Data Source
AI summary
An embodiment method of streamlining parasitic modeling using a common device profile includes importing, using a processor, a simulated middle end of line (MEOL) profile into a characterization tool, generating, using the processor, a MEOL pattern based on the simulated MEOL profile, import, using the processor, the MEOL pattern and a real profile into a field solver to generate a MEOL capacitance table, updating, using the processor, capacitance data in the characterization tool based on the MEOL capacitance table generated, and generating, using the processor, a resistance and capacitance parasitic extraction technology file using the characterization tool with the capacitance data as updated.


