Parity Block System for Solid State Memory Data Retention
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Solution Overview
Problem
Non-volatile solid state memory systems face data retention challenges due to voltage decay across floating gates, leading to data loss, and existing error checking systems like block-based parity consume significant storage space.
Innovation Solution
Implementing a parity block system in solid state memory that includes multiple user data pages and parity pages, with parity data generated and stored to efficiently correct errors and free up storage space, using a method that fills unused pages with pattern data when the block is not full and finalizing the block before power down or timer expiration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If block-based parity systems are used for error checking, then data integrity is improved, but storage space consumption increases significantly
Solution Approach 1:
The patent divides the storage space into multiple parity blocks, each containing a subset of user data pages and shared parity pages. This segmentation allows parity data to be distributed across multiple blocks rather than requiring a single large parity structure, improving space utilization while maintaining data integrity through localized error correction capability.
Solution Approach 2:
The parity pages serve multiple functions: they provide error correction for user data within the same parity block, enable efficient space utilization by sharing parity data across multiple user data pages, and support both full and partial block filling scenarios through the same structural framework.
2Reliability
If parity blocks are finalized early to ensure data retention, then data reliability is improved, but storage capacity for user data decreases
Solution Approach 1:
The patent implements a dynamic block finalization strategy where the timing of finalization is flexible rather than fixed. Blocks can be finalized at different times based on system conditions, power state, and fill status. This allows the system to maximize user data capacity by keeping blocks open longer when possible, while still ensuring data retention by finalizing blocks before power down or timer expiration.
Solution Approach 2:
The system changes the parameter of block finalization from a static rule to a dynamic decision based on multiple factors including power state, timer status, and block fill level. This allows optimization of both data retention and storage capacity by adjusting finalization timing according to actual system conditions.
3Reliability
If unused pages are filled with pattern data before finalization, then data integrity is improved, but processing time increases
Solution Approach 1:
The patent performs preliminary filling of unused pages with pattern data before block finalization. This preliminary action ensures that when parity data is generated, all pages in the block have valid data to work with, improving data integrity. The operation is performed early in the process so that subsequent parity generation can proceed efficiently without interruptions.
Solution Approach 2:
The pattern data used to fill unused pages serves a temporary purpose - it provides placeholder data during the block finalization process. Once parity data is generated and the block is finalized, the original pattern data in unused pages is replaced or overwritten. This disposable approach to data filling minimizes processing overhead while ensuring integrity during the critical finalization window.
Data Source
AI summary
A circuit may be configured to increase the data retention reliability of non-volatile solid state memory (NVSSM) by writing a parity block, which can contain user data pages and parity data pages. A circuit can also be configured to store the parity data pages based on whether the user data pages in the block have been filled, on elapsed time, or during a power down event.