Parity-Matrix ECC with Total Parity Bits for Multiple Error Detection

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Solution Overview

Problem

Current error-correcting codes, such as SECDED, are costly in terms of computation and resource consumption, making them inefficient for reliable data storage and transmission, especially in detecting and correcting multiple errors.

Innovation Solution

An error-correcting coding method that generates code words by adding check bits defined by a parity matrix, separating them into total parity bits and conventional check bits, and constructing the parity matrix into submatrices to enable efficient error detection and correction, including multiple error detection capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If SECDED codes are used for error correction and detection, then data reliability is improved, but circuit surface area and energy consumption increase significantly

Engineering Contradiction:
Improvedata reliabilityVSAvoidcircuit surface area
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The code word is divided into multiple subsets, each processed independently with its own syndrome calculation. This segmentation allows parallel processing of error detection and correction, reducing the overall circuit complexity and surface area while maintaining SECDED capability across the entire code word.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of applying full SECDED processing to the entire code word at once, the method applies error correction to subsets of the code word. This partial action approach reduces the computational burden and circuit requirements while still achieving reliable error correction through multiple passes.

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If SECDED codes are used for error correction and detection, then data reliability is improved, but energy consumption increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The code word is divided into multiple subsets, each processed independently with its own syndrome calculation. This segmentation allows parallel processing of error detection and correction, reducing the overall circuit complexity and surface area while maintaining SECDED capability across the entire code word.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of applying full SECDED processing to the entire code word at once, the method applies error correction to subsets of the code word. This partial action approach reduces the computational burden and circuit requirements while still achieving reliable error correction through multiple passes.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If codes for correcting multiple errors are used, then error correction capability is improved, but computation cost increases significantly

Engineering Contradiction:
Improveerror correction capabilityVSAvoidcomputation cost
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The code word is divided into multiple subsets, each processed independently with its own syndrome calculation. This segmentation allows parallel processing of error detection and correction, reducing the overall circuit complexity and surface area while maintaining SECDED capability across the entire code word.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of applying full SECDED processing to the entire code word at once, the method applies error correction to subsets of the code word. This partial action approach reduces the computational burden and circuit requirements while still achieving reliable error correction through multiple passes.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8566679B2Error-correcting encoding method with total parity bits, and method for detecting multiple errors
Publication Date: 2013.10.22 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
  • US8566679B2 patent drawing
  • US8566679B2 patent drawing
  • US8566679B2 patent drawing

AI summary

An error-correcting coding method generates code words of m bits from useful data blocks of n bits. The method adds k check bits to a block of n useful data bits in order to generate a code word of m=n+k bits, said check bits being defined according to the combination rules defined by a parity matrix H consisting of binary elements and having k rows and m columns such that H·V=0, V being a column matrix whose m elements are the m bits of the code word to be generated. The k check bits are separated into two groups, on the one hand a group of k1 bits called total parity bits PT and on the other hand a group of k2 bits called conventional check bits VC, the values of k, k1 and k2 satisfying the conditions k=k1+k2 and k>k1>2, the matrix H whose columns can be swapped being broken down into six submatrices A, B, C, D, E and F. Another method detects multiple errors in code words generated by the coding method.