Parity Reset Circuit for Partial Reset Attack Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing reset circuits in electronic systems are vulnerable to partial reset attacks, which can disrupt operations and compromise security, and there is a need for improved circuits that can detect such attacks.
Innovation Solution
A reset circuit with a parity control circuit and flip-flops configured to detect anomalies, utilizing a parity control circuit and flip-flops to identify discrepancies in flip-flop states during a partial reset attack, triggering a device reset when anomalies are detected.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a reset circuit is implemented in electronic systems, then the system can be reset to a known initial state, but the system becomes vulnerable to partial reset attacks
Solution Approach 1:
The patent applies preliminary action by implementing a parity control circuit and monitoring flip-flops that proactively track the state of reset-targeted flip-flops before a reset operation occurs. These monitoring elements are pre-configured to detect any unauthorized state changes, allowing the system to identify partial reset attacks before they can compromise security. The anomaly detection capability is built-in advance, enabling preventive security measures.
Solution Approach 2:
The patent implements feedback through a parity control circuit that continuously monitors the states of multiple flip-flops and compares them against expected parity conditions. When a reset signal is applied, the monitoring flip-flops provide feedback about which flip-flops actually received the reset, allowing the system to detect discrepancies between intended and actual reset operations. This feedback mechanism enables real-time detection of partial reset attacks.
2Measurement precision
If monitoring flip-flops are placed close to each other, then detection of partial reset attacks is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the monitoring function into multiple distributed monitoring flip-flops, each associated with specific target flip-flops. Rather than using a single complex monitoring mechanism, the system segments the detection task across multiple simple flip-flop elements. Each monitoring flip-flop tracks a subset of target flip-flops, and the parity control circuit segments the overall parity checking into manageable groups, reducing individual component complexity while maintaining overall detection accuracy.
Data Source
AI summary
An electronic device includes at least two electronic components. A reset circuit includes: a parity control circuit; at least two first flip-flops, wherein each first flip-flop has an output coupled to at least one of the at least two electronic components; and at least two second flip-flops, wherein each second flip-flop has at least one output coupled to an input of the parity control circuit.