Multi-Level Memory Cell Programming via Partial Reset Signals
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Solution Overview
Problem
Existing memory cells are unable to efficiently set a plurality of intermediate states between high-current and low-current states, which limits their ability to store multiple values beyond binary 1/0 in non-Von Neumann architectures and other applications.
Innovation Solution
The use of programmatic algorithms with ReRAM or filamentary memory cells to transition between high-current and low-current states through partial set and reset signals, allowing for the creation of current-efficient intermediate states without altering the memory cell's materials or configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional binary memory states (high-current and low-current) are used, then the memory cell structure remains simple, but the ability to store multiple values beyond binary 1/0 is limited
Solution Approach 1:
The patent applies parameter changes by utilizing multiple intermediate current states between the high-current (logic 1) and low-current (logic 0) states. By controlling the filament formation process to achieve different current levels (e.g., 10 nA to 1 μA ranges), the memory cell can represent multiple values without changing its fundamental 1T1R structure, thus resolving the contradiction between storage versatility and structural simplicity
Solution Approach 2:
The patent implements dynamics by enabling the memory cell to dynamically transition between multiple current states through controlled voltage pulses. The filamentary memory element can be programmed to different resistance states and read at various current levels, allowing the same physical structure to adaptively represent different data values based on the applied programming sequence
2Adaptability or versatility
If multiple intermediate states are implemented through material or configuration changes, then multi-state storage is achieved, but the manufacturing complexity increases
Solution Approach 1:
Instead of changing materials or physical configuration to achieve multi-state storage, the patent changes the operational parameters by controlling the current state of the existing filamentary memory element. The same memory cell structure and materials can be programmed to different states (e.g., 3-16 intermediate states) through voltage pulse sequences, avoiding complex manufacturing processes while achieving multi-state capability
Solution Approach 2:
The patent makes the existing memory cell structure universal by enabling it to perform both binary and multi-state storage functions without modification. The same 1T1R cell that originally supported only 0/1 states can now be programmed to support multiple intermediate states, making the manufacturing process unchanged while expanding functionality
3Quantity of substance
If intermediate states are created with higher current consumption, then more states can be distinguished, but power efficiency decreases
Solution Approach 1:
The patent optimizes the parameter range of intermediate states to balance state distinguishability with power efficiency. By selecting current states in the 10 nA to 1 μA range (rather than using higher current levels), the system achieves multiple distinguishable states (3-16 states) while maintaining low power consumption suitable for energy-efficient applications
Solution Approach 2:
The patent applies partial action by using only the necessary portion of the full current range to create intermediate states. Rather than utilizing the entire possible current spectrum, the system uses a controlled subset (10 nA to 1 μA) that provides sufficient state differentiation while minimizing power consumption, avoiding excessive current usage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables memory cells to operate in multiple intermediate states with significantly reduced current consumption, making them suitable for low-power applications like neural networks and non-Von Neumann architectures, while maintaining stability and controllability.
Implementation Method 1
a filament may be formed between a pair of metal electrodes that causes the memory element to conduct in a relatively high-current state to represent a logic 1 value
Implementation Method 2
A resistive random-access memory (ReRAM) is a type of nonvolatile random-access memory (RAM) that operates by changing resistance across a dielectric solid-state material
Data Source
AI summary
A method for setting memory elements in a plurality of states includes applying a set signal to a memory element to transition the memory element from a low-current state to a high-current state; applying a partial reset signal to the memory element to transition the memory element from the high-current state to a state between the high-current state and the low-current state; determining whether the state corresponds to a predetermined state; and applying one or more additional partial reset signals to the memory element until the state corresponds to the predetermined current state. The memory element may be coupled in series with a transistor, and a voltage control circuit may apply voltages to the transistor to set and partially reset the memory element.