Rasterization Partial Span Identification for MSAA Block Reduction
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Solution Overview
Problem
Existing graphics processing techniques require evaluating a large number of 4×4 pixel subsets during multi-sampling anti-aliasing, leading to increased power consumption and chip area usage, as they check for fully covered, void, or partial subsets, without efficiently reducing the number of blocks to be calculated.
Innovation Solution
The proposed solution reduces the number of 4×4 blocks to be evaluated by identifying the maximum number of partial blocks, utilizing the property that only a small set of spans are partial, and employing symmetry to reduce the number of comparisons, thereby calculating only partial spans, which significantly decreases the number of blocks that must be calculated.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If all 4×4 pixel subsets are evaluated to determine fully covered, void, or partial subsets during multi-sampling anti-aliasing, then rendering accuracy is maintained, but the number of calculations increases leading to higher power consumption and chip area usage
Solution Approach 1:
The patent extracts and identifies only the partial spans from the set of all spans, recognizing that only partial spans require detailed 4×4 block evaluation. By separating partial spans from fully covered and void spans, the method evaluates only the necessary blocks rather than all blocks, thereby reducing power consumption while maintaining rendering accuracy.
Solution Approach 2:
The patent applies partial action by evaluating only the necessary portion of blocks (those corresponding to partial spans) rather than all blocks. This selective evaluation approach performs exactly the required calculations without excessive computation, reducing power consumption while sufficient rendering accuracy is maintained.
2Measurement precision
If all 4×4 pixel subsets are evaluated during multi-sampling anti-aliasing, then complete coverage information is obtained, but the chip area required increases
Solution Approach 1:
The patent extracts only the partial spans that require detailed evaluation, separating them from spans that are fully covered or void. This extraction allows the system to maintain complete coverage information for partial spans while avoiding the need to evaluate all spans, thereby reducing the chip area required for the rasterization circuitry.
Solution Approach 2:
The patent performs partial evaluation of only those blocks that contain partial spans, rather than evaluating all blocks. This partial action approach maintains complete coverage information where needed while reducing the overall chip area by eliminating unnecessary evaluation circuits for fully covered and void spans.
3Use of energy by stationary object
If the number of 4×4 blocks to be calculated is reduced by identifying maximum partial blocks, then power consumption and die area are reduced, but the complexity of determining partial spans increases
Solution Approach 1:
The patent performs preliminary action by pre-calculating and storing the maximum number of partial spans for different primitive types and MSAA configurations. This pre-computation is done during design or initialization, allowing the runtime system to simply lookup and use these pre-determined values without complex real-time calculations, thus reducing power consumption without significantly increasing runtime complexity.
Solution Approach 2:
The patent applies preliminary action by pre-determining the maximum number of partial blocks that can exist for given primitive types and MSAA types. This information is prepared in advance and stored, enabling the system to quickly identify and evaluate only the necessary blocks during rendering, reducing power consumption while avoiding complex runtime analysis.
4Productivity
If only partial spans are calculated instead of all spans, then the number of cycles required to process data is reduced, but the complexity of identifying partial spans increases
Solution Approach 1:
The patent uses preliminary action by pre-calculating the maximum number of partial spans for different primitive types and MSAA configurations. This pre-computation allows the system to quickly identify partial spans during rendering without complex real-time calculations, thereby reducing processing cycles while managing complexity through advance preparation.
Solution Approach 2:
The patent uses copying by creating simplified representations or lookup tables of partial span information that can be quickly referenced during rendering. Instead of performing complex real-time analysis, the system copies pre-computed partial span data into easily accessible formats, enabling fast identification of partial spans and reducing processing cycles.
Data Source
AI summary
A pixel input is divided into blocks. The a number of blocks is determined based on the maximum number of partial spans. Finally, the blocks are rasterized.


