Partial Verification Scheme for Nonvolatile Memory Blocks

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Solution Overview

Problem

Non-volatile memory devices face failures due to manufacturing imperfections and programming issues, leading to data loss, and existing post-programming verification methods are inefficient in terms of complexity, latency, and power consumption.

Innovation Solution

A partial verification scheme is implemented in a storage device that tests only a data portion of the programmed data, calculates redundancy data for recovery, and conditionally performs full verification based on predefined conditions, such as performance metrics and likelihood metrics, to efficiently verify and recover corrupted data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If full verification is performed on all programmed data, then data reliability is improved, but power consumption and processing time increase

Engineering Contradiction:
Improvedata verification reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies partial verification by testing only a subset of programmed data (e.g., every nth word line or selected regions) rather than performing full verification on all data. This partial action approach maintains acceptable reliability while significantly reducing power consumption and processing time, especially when combined with likelihood metrics to determine when full verification is truly necessary.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent changes the verification parameter from binary (full verification or none) to a probabilistic approach using likelihood metrics. By calculating likelihood values based on partial verification results and comparing them against thresholds, the system dynamically adjusts the verification scope, thereby optimizing the balance between reliability and power consumption based on actual data conditions.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If full verification is performed on all programmed data, then data reliability is improved, but programming throughput decreases

Engineering Contradiction:
Improvedata verification reliabilityVSAvoidprogramming throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements partial verification schemes that test only a portion of the programmed data (such as every nth word line or selected data pages) rather than performing complete verification. This approach maintains sufficient reliability for most cases while dramatically improving programming throughput by reducing the verification workload.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent performs preliminary partial verification immediately after programming to quickly identify obviously defective blocks. By conducting this initial check before more thorough verification, the system can quickly process good blocks and defer or skip extensive verification for potentially defective blocks, thereby improving overall throughput while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If partial verification is performed on only a data portion, then power consumption and throughput are improved, but verification coverage is reduced

Engineering Contradiction:
Improveprogramming throughputVSAvoidverification coverage
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent uses feedback from partial verification results to dynamically determine subsequent verification actions. By calculating likelihood metrics based on the outcomes of partial verification and comparing them against thresholds, the system decides whether to perform full verification or accept the partial verification results, thereby compensating for the reduced coverage through intelligent decision-making.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent replaces the mechanical approach of uniformly applying full verification to all data with an intelligent, metric-driven system. By substituting the deterministic full verification mechanism with a probabilistic likelihood-based decision system, the patent achieves better verification coverage efficiency while maintaining reliability through smart selection of when and where to perform comprehensive checks.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Productivity

If likelihood metric calculation is performed to determine full verification need, then verification efficiency is improved, but computational complexity increases

Engineering Contradiction:
Improveverification efficiencyVSAvoidcomputational complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the verification process into distinct stages: partial verification, likelihood metric calculation, threshold comparison, and conditional full verification. This segmentation allows the system to perform simple operations first and only engage in more complex computations when necessary, thereby improving overall verification efficiency while managing computational complexity through staged processing.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10755787B2Efficient post programming verification in a nonvolatile memory
Publication Date: 2020.08.25 APPLE INC
  • US10755787B2 patent drawing
  • US10755787B2 patent drawing
  • US10755787B2 patent drawing

AI summary

A storage device includes storage circuitry and multiple memory cells. The memory cells are organized in multiple memory blocks of a nonvolatile memory. The storage circuitry is configured to define a partial verification scheme that specifies testing only a data portion of the data programmed to the memory blocks, to program data to a memory block, calculate redundancy data over the data, and save the calculated redundancy data in a dedicated memory, to verify that the data portion specified for the memory block in the partial verification scheme has been programmed successfully, to check a predefined condition for conditionally performing full verification to the memory block, when the predefined condition is fulfilled, to verify that data programmed to the memory block and not tested using the partial verification scheme has been programmed successfully, and to recover, using the redundancy data, at least part of the data programmed that failed verification.