Dynamic Pass Voltage Tuning for Flash Memory Fail-Bit Control
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Solution Overview
Problem
Existing flash memory technologies face challenges in controlling the threshold voltage distribution of memory cells, particularly in multi-bit storage, leading to increased fail bit counts due to improper pass voltage settings, which affect yield and reliability over program/erase cycles.
Innovation Solution
A method to dynamically adjust the sweet spot of the pass voltage by calculating shifts in low and high boundary values based on ISPP and ISPE pulse numbers over cycles, optimizing the pass voltage to remain between these boundaries, thereby reducing fail bit counts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed pass voltage is used during program/erase cycles, then the initial programming and erasing operations can be performed, but the pass voltage becomes improper over cycles leading to increased fail bit counts and reduced reliability
Solution Approach 1:
The patent implements dynamic adjustment of the pass voltage based on the number of program/erase cycles. The pass voltage is no longer fixed but changes adaptively according to cycle count, transforming the static voltage parameter into a dynamic one that evolves with device usage to maintain optimal programming and erasing performance throughout the device lifecycle
Solution Approach 2:
The patent changes the parameter of pass voltage from a constant value to a variable value that depends on cycle count. By establishing a relationship between pass voltage and cycle number, the system adjusts the voltage parameter dynamically to compensate for device degradation and threshold voltage shifts that occur over multiple program/erase cycles
2Productivity
If the pass voltage is not optimized over cycles, then the programming and erasing operations can proceed with simple fixed voltage control, but the fail bit count increases and yield decreases
Solution Approach 1:
The patent introduces a feedback mechanism where the cycle count is monitored and used to determine the appropriate pass voltage for subsequent operations. This feedback loop allows the system to automatically adjust the pass voltage based on accumulated usage, maintaining high yield by preventing programming/erasing failures without requiring complex external control systems
3Manufacturing precision
If a static pass voltage is applied, then the control mechanism is simple, but the threshold voltage distribution cannot be properly controlled leading to increased fail bits
Solution Approach 1:
The patent employs parameter changes by adjusting the pass voltage according to cycle count to maintain proper threshold voltage distribution. This approach achieves precise control over memory cell threshold voltages throughout the device lifecycle, ensuring that programming and erasing operations remain effective without requiring complex control circuitry
Data Source
AI summary
Provided is a method of optimizing pass voltage including: determining a sweet point of an initial pass voltage; monitoring a pulse number of ISPP; obtaining a shift of a low boundary value of the pass voltage by a shift of the pulse number of the ISPP at different cycles; monitoring a pulse number of ISPE; obtaining a shift of a high boundary value of the pass voltage by a shift of the pulse number of the ISPE at the different cycles; adding the shift of the high boundary value and the shift of the low boundary value and dividing by 2 to get a shift of the sweet point of the pass voltage; and adding the sweet point of the initial pass voltage and the shift of the sweet point of the pass voltage to obtain an optimized pass voltage value.