Passgate Circuit Low-Pass Filter for DRAM Signal Integrity

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Solution Overview

Problem

Semiconductor devices, such as DRAM, face signal quality degradation in low-speed operation modes due to circuit characteristics optimized for high-speed modes, leading to ring-back issues and reduced data eyes.

Innovation Solution

The semiconductor device employs a passgate circuit with adjustable resistance paths, controlled by control signals, to function as a low-pass filter in low-speed mode, eliminating unnecessary ring-back components and maintaining signal quality by altering the circuit characteristics based on operation modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If circuit characteristics of input circuit are optimized for high-speed operation mode, then high-speed signal transmission is improved, but signal quality is degraded in low-speed operation mode

Engineering Contradiction:
Improvesignal transmission speedVSAvoidsignal quality
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies dynamics by making the input circuit characteristics adjustable through control signals. The circuit can dynamically switch between different operational states (high-speed mode with optimized transmission characteristics and low-speed mode with filtered characteristics) based on the operating frequency, allowing optimal performance across different speed regimes without fixed compromise

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes circuit parameters (such as resistance values, capacitance values, or transistor sizing) based on the operation mode. By adjusting these parameters through control signals, the circuit achieves different characteristic impedances and filtering properties suitable for either high-speed transmission or low-speed signal quality, resolving the contradiction between speed optimization and signal quality

Inventive Principle:
Principle #35Parameter changes

2Speed

If passgate circuit resistance is reduced for high-speed mode, then signal transmission speed is improved, but ring-back occurs in low-speed mode

Engineering Contradiction:
Improvesignal transmission speedVSAvoidring-back
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The passgate circuit resistance is made dynamic rather than fixed. Control signals adjust the effective resistance of the passgate circuit based on the operation mode, enabling low resistance for high-speed transmission and high resistance for ring-back suppression in low-speed mode

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The resistance parameter of the passgate circuit is changed based on operational requirements. By modifying the resistance value through control signals (affecting transistor gate voltages or circuit configuration), the circuit eliminates ring-back in low-speed mode while maintaining speed performance in high-speed mode

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively prevents data eye reduction and maintains signal integrity in low-speed operation modes by attenuating high-frequency components and reducing unnecessary reflections, ensuring consistent performance across different operation frequencies.

Implementation Method 1

the passgate circuit functions as a low-pass filter when the semiconductor device is in the low-speed operation mode, thereby eliminating unnecessary ring-back components

Methodology Applied
Scientific EffectLow-pass filter: Filter (electronic)

Data Source

PatentUS20240386942A1Semiconductor device having pad electrode equipped with low pass filter circuit
Publication Date: 2024.11.21 MICRON TECHNOLOGY INC
  • US20240386942A1 patent drawing
  • US20240386942A1 patent drawing
  • US20240386942A1 patent drawing

AI summary

An example apparatus includes a passgate circuit between first and second nodes, the passgate circuit having a plurality of transistors at least two of which are operatively connected in parallel in a first mode and operatively connected in series in a second mode. The plurality of transistors may include first and second transistors coupled in parallel between the first and second nodes and controlled in common by a first control signal activated in the first mode. The plurality of transistors may further include third and fourth transistors connected in series between the first and second nodes and controlled in common by a second control signal activated in the second mode.