Passive Buffer DC Level Shift for Wideband CTLE Inputs
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Solution Overview
Problem
Wideband wired communication systems face challenges in power consumption and efficiency due to the high power consumption of buffers in multi-stage signal processing, especially in low-voltage systems, which affects the performance of components like CTLEs.
Innovation Solution
A passive buffer circuit is introduced, comprising buffer elements with resistors, capacitors, and inductors, along with a feedback loop and current sources, to control DC voltage and reduce power consumption, while maintaining high bandwidth and providing a well-controlled DC level for CTLEs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a buffer is used in multi-stage signal processing, then signal level shifting and isolation are improved, but power consumption increases
Solution Approach 1:
The patent replaces the active buffer (electronic amplification system) with a passive buffer consisting of transmission line elements (inductors, capacitors, resistors) that provides signal level shifting and isolation without requiring active power consumption, thereby resolving the contradiction between reliability and energy use
Solution Approach 2:
The patent introduces a feedback loop with an error amplifier as an intermediary mechanism that controls current sources to maintain proper DC voltage levels at the input of the CTLE, enabling the passive buffer to achieve the functionality of an active buffer with reduced power consumption
2Reliability
If a buffer is used between stages, then loading effects are reduced, but device complexity increases
Solution Approach 1:
The patent segments the buffer functionality into distinct passive elements (inductors L1-L4, capacitors C1-C4, resistors R1-R4) arranged in a specific configuration, allowing each element to contribute to isolation and level shifting while maintaining modularity and reducing overall circuit complexity
Solution Approach 2:
The passive buffer structure serves multiple functions simultaneously: it provides signal isolation, level shifting, and impedance matching between stages, reducing the need for separate dedicated circuits and thereby reducing overall device complexity
Data Source
AI summary
Embodiments of a passive buffer circuit and a wideband communication circuit that uses the passive buffer circuit are disclosed. In an embodiment, the passive buffer circuit includes buffer elements connected between input terminals and output terminals that are connected to input terminals of a communication component circuit with a plurality of input transistors. Each of the buffer elements provides a first path with a resistor and a second path with a series-connected capacitor and inductor. The passive buffer circuit further includes current sources connected between the output terminals and at least one fixed voltage and a feedback loop from the input transistors to the current sources to control direct current (DC) voltage at each of the input terminals of the communication component circuit. The feedback loop includes an error amplifier that controls the current sources based on voltages on the input transistors with respect to a reference voltage.