Pattern-Sensitive Multi-Level Memory Cell Encoding

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Solution Overview

Problem

Programming data into multi-level nonvolatile memory cells is slow and causes cell damage, requiring multiple cycles and potentially disturbing adjacent cells, necessitating a reduction in programming cycles and damage.

Innovation Solution

A method is introduced to select a multi-level encoding based on cost evaluation for programming data into multi-level cells, allowing each cell to store multiple bits efficiently by using cost functions to determine the optimal encoding levels, thereby reducing programming time and cell damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple program-and-verify cycles are used to program data into multi-level memory cells, then data storage accuracy is improved, but programming time increases and cell damage accumulates

Engineering Contradiction:
Improvedata storage accuracyVSAvoidprogramming time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing a read operation before programming to determine the current state of memory cells. This preliminary information is used to select an optimal encoding scheme that minimizes the number of program cycles needed, thereby reducing programming time while maintaining data storage accuracy through targeted verification only where necessary.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes parameters by dynamically selecting different encoding schemes (e.g., different voltage threshold levels, different bit representations) based on the data being programmed and the current cell states. This parameter adaptation allows the system to optimize the balance between verification requirements and programming speed, reducing unnecessary cycles while maintaining accuracy.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If multiple program-and-verify cycles are used to program data into multi-level memory cells, then data storage accuracy is improved, but the number of programming cycles increases

Engineering Contradiction:
Improvedata storage accuracyVSAvoidprogramming throughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

By performing preliminary reads to assess cell states before programming, the system can determine which cells require verification and which do not. This eliminates unnecessary verify cycles for cells that are guaranteed to program correctly, thereby increasing programming throughput while maintaining data storage accuracy through selective verification.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies partial action by performing verification only on a subset of memory cells that are likely to have programming errors based on their initial state and the programming operation being performed. This partial verification approach maintains data storage accuracy for critical cells while reducing the total number of verification cycles, thereby improving overall programming throughput.

Inventive Principle:
Principle #16Partial or excessive action

3Device complexity

If conventional encoding is used to program data into multi-level memory cells, then implementation simplicity is maintained, but cell damage increases and reliability decreases

Engineering Contradiction:
Improveencoding complexityVSAvoidmemory cell reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent changes encoding parameters dynamically based on data patterns and cell states, selecting from multiple encoding schemes with different characteristics. Some encodings are chosen to minimize voltage stress on cells, while others optimize for speed or accuracy. This adaptive parameter selection improves reliability by reducing cell damage without requiring a completely complex encoding system, as the choice is made from a predefined set of schemes.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamics by making the encoding scheme selectable and adaptable rather than fixed. The system dynamically chooses encoding parameters based on real-time conditions such as data being programmed, current cell states, and wear levels. This dynamic adaptation improves reliability by avoiding encodings that would cause excessive damage in particular situations, while the overhead remains manageable because the adaptation is based on simple decision rules.

Inventive Principle:
Principle #15Dynamics

4Device complexity

If programming is performed without intelligent encoding selection, then process simplicity is maintained, but adjacent cell disturbance increases

Engineering Contradiction:
Improveprogramming process complexityVSAvoidadjacent cell disturbance
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by selecting encoding schemes that are optimized for specific local conditions, such as the data pattern being programmed or the state of particular memory cells. Different encoding approaches are applied to different regions or different data types within the same programming operation, minimizing disturbance to adjacent cells by using the most appropriate encoding for each local context without requiring a completely complex global system.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8665642B2Pattern-sensitive coding of data for storage in multi-level memory cells
Publication Date: 2014.03.04 RAMBUS INC
  • US8665642B2 patent drawing
  • US8665642B2 patent drawing
  • US8665642B2 patent drawing

AI summary

A method of operating a memory device includes receiving first and second sets of bits to be stored in multi-level cells in the device. A multi-level encoding is selected from among a plurality of multi-level encodings for storing the first and second sets of bits in the multi-level cells. Each multi-level encoding includes at least four encoding levels for a respective multi-level cell. Respective multi-level encodings have respective costs associated with programming the first and second sets of bits into the multi-level cells in accordance with the respective multi-level encodings. The multi-level encoding is selected based on the respective costs of the respective encodings. The first and second sets of bits are encoded in accordance with the selected multi-level encoding to produce encoded data for storage in the device such that a respective multi-level cell stores respective bits from both the first and second sets of bits.