Patterned Dielectric Anti-Reflection Layer for CMOS Image Sensors
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Solution Overview
Problem
The existing manufacturing processes for CMOS image sensors face issues with the thickness of the stack formed by the protecting layer, self-alignment silicide block, and anti-reflection layer, which affects continuous manufacturing and product quality by causing plasma damage to the photo receiving area and increasing reflection during the contact hole photolithograph process.
Innovation Solution
The introduction of a patterned dielectric anti-reflection layer that serves as both an etching stop layer during the spacer etching process and a self-alignment silicide block, protecting the photo diode from damage and reducing contamination, while also acting as an etching stop layer in the contact hole process to minimize light reflection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a protecting layer, self-alignment silicide block, and anti-reflection layer are formed to protect the photo receiving area, then the photo diode is protected from plasma damage, but the stack thickness increases causing continued plasma damage and increased light reflection
Solution Approach 1:
The patent combines the anti-reflection layer and self-alignment silicide block into a single integrated layer. This merged structure eliminates the need for a separate thick protecting layer while maintaining photo diode protection during plasma processes and reducing light reflection during photolithography, thereby resolving the contradiction between protection reliability and harmful factors.
Solution Approach 2:
The integrated layer serves multiple functions simultaneously: it acts as an anti-reflection layer for photolithography, a self-alignment silicide block for source/drain formation, and a protecting layer for the photo receiving area during plasma processes. This multi-functionality reduces overall stack thickness while maintaining all necessary protective functions.
2Reliability
If multiple separate layers are used for protection and anti-reflection, then comprehensive protection is achieved, but the manufacturing process complexity increases
Solution Approach 1:
The patent merges multiple functional layers into a single integrated structure that can be formed in one deposition step. This reduces the number of separate manufacturing steps, simplifies the process, and decreases overall stack thickness while maintaining comprehensive protection functions.
3Reliability
If a thick stack is formed for protection, then the photo diode is well-protected, but continuous manufacturing is affected and product quality decreases
Solution Approach 1:
By combining multiple protective functions into a single thinner integrated layer, the patent enables more efficient plasma processing and photolithography steps. This reduces process time and allows for continuous manufacturing while maintaining adequate photo diode protection, thereby improving productivity without sacrificing reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the manufacturing process by preventing damage to the photo diode, reducing contamination, and decreasing light reflection, thereby improving the continuity and quality of the image sensor production.
Implementation Method 1
An etching process is then performed on the covering layer for forming a spacer around the gate electrodes
Implementation Method 2
A self-alignment silicide (salicide) process is then performed, so salicides are formed on the gate electrode, and the source/drain respectively
Implementation Method 3
acting as an etching stop layer in the contact hole process to minimize light reflection
Implementation Method 4
an ion implantation process is performed to form dopants such as the source/drains in the lateral sides of the gate electrodes
Data Source
AI summary
An image sensor includes a semiconductor substrate, a photo receiving area in the semiconductor substrate, a gate electrode installed in a lateral side of the photo receiving area on the semiconductor substrate, and a patterned dielectric layer covering the gate electrode, the photo receiving area, and exposing a partial gate electrode. A spacer surrounds the gate electrode on the dielectric layer.