Patterned Semiconductor Layer via Inverse Substrate Template

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Solution Overview

Problem

Existing methods for producing patterned III-V semiconductor layers, such as GaN or InGaN, face challenges including light trapping due to high refractive indices, alignment issues in lithography, and risk of damage during patterning, especially with thin semiconductor layers on substrates like GaNOS or InGaNOS.

Innovation Solution

A method involving a patterned substrate with an intermediate layer, where the intermediate layer's pattern is inverse to the substrate's pattern, allowing for anisotropic etching to transfer the pattern to the semiconductor layer without requiring photolithography or alignment, and enabling the removal of the substrate by laser lift-off or chemical etching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If lithography is used to pattern the GaN or InGaN layer, then the light extraction is enhanced, but alignment issues and risk of damage to the semiconductor devices occur

Engineering Contradiction:
Improvelight extraction efficiencyVSAvoiddamage risk to semiconductor devices
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-patterned substrates (sapphire or GaN) that already contain the desired pattern structure before the semiconductor layer is deposited. This eliminates the need for subsequent lithography and etching steps on the fragile semiconductor layer, thereby preventing damage while achieving the same light extraction enhancement.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent inverts the conventional approach by transferring the pattern from the substrate to the semiconductor layer, rather than patterning the semiconductor layer directly. The patterned substrate serves as a mask or template during deposition, so the pattern is formed in the GaN/InGaN layer without requiring lithography on that layer, thus avoiding damage risk.

Inventive Principle:
Principle #13The other way round (Inversion)

2Loss of energy

If lithography is used to pattern the GaN or InGaN layer, then the light extraction is enhanced, but alignment issues occur

Engineering Contradiction:
Improvelight extraction efficiencyVSAvoidalignment precision
Core Design Contradiction:
Loss of energyVSManufacturing precision

Solution Approach 1:

The pattern is pre-formed on the substrate before semiconductor layer deposition, eliminating the need for alignment-critical lithography steps on the semiconductor layer. The substrate pattern serves as a fixed reference that automatically aligns with the underlying structure, removing alignment issues entirely.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses the substrate pattern as a master template that is copied onto the semiconductor layer through conformal deposition or as a mask. This copying process automatically preserves the pattern alignment without requiring separate alignment steps, as the pattern is transferred directly from the substrate to the layer above it.

Inventive Principle:
Principle #26Copying

3Productivity

If the semiconductor layer thickness is reduced for GaNOS or InGaNOS substrates, then the device structure is optimized, but the patterning becomes more problematic and damage risk increases

Engineering Contradiction:
Improvedevice structure optimizationVSAvoiddamage risk during patterning
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

By pre-patterning the substrate before depositing the thin semiconductor layer, the patent eliminates the need for subsequent patterning steps on the thin, fragile layer. This preliminary action on the robust substrate allows the thin semiconductor layer to be deposited conformally without exposure to damaging patterning processes.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances light extraction from LEDs by creating patterned layers without damaging the semiconductor devices and eliminates the need for critical alignment, improving the efficiency of light emission across various wavelengths and reducing the risk of damage during the patterning process.

Implementation Method 1

anisotropic etching the intermediate layer, implemented from the first face of the intermediate layer until parts of a face of the layer of material intended to be patterned are no longer covered by the intermediate layer

Methodology Applied
Scientific EffectAnisotropic etching:

Implementation Method 2

removing the first substrate; anisotropic etching the intermediate layer, implemented from the first face of the intermediate layer

Methodology Applied
Scientific EffectLaser ablation: Laser Ablation

Data Source

PatentUS11495710B2Method for producing a patterned layer of material
Publication Date: 2022.11.08 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
  • US11495710B2 patent drawing
  • US11495710B2 patent drawing
  • US11495710B2 patent drawing

AI summary

A method for producing a patterned layer of material includes producing a first substrate having a patterned face, producing, against the patterned face of the first substrate, a stack of layers having an intermediate layer and the layer to be patterned, the intermediate layer being disposed between the layer to be patterned and the first substrate, a first face of the intermediate layer disposed on the first substrate side being patterned in accordance with a design that is the inverse of that of the patterned face of the first substrate, and removing the first substrate. The intermediate layer is anisotropically etched from the first face of the intermediate layer, and at least part of the thickness of the layer to be patterned is etched, patterning a face of the layer to be patterned in accordance with the design of the first face of the intermediate layer.