Patterned Wafer Surface Charge for Carbon Nanotube Alignment
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Solution Overview
Problem
Existing methods for placing carbon nanotubes on substrates often result in random placement, orientation, or bundling, leading to variability in the number of carbon nanotubes in a single transistor and difficulties in achieving a highly ordered arrangement.
Innovation Solution
The use of wafers with alternating areas of different surface charges, where alignment areas with a specific polarity and spacing areas with a different polarity are arranged to guide the alignment of carbon nanotubes, reducing bundling and allowing for precise control over the distance between individual nanotubes through lithographic definition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional methods are used to place carbon nanotubes on substrates, then the process is simple and fast, but the placement is random and bundling occurs
Solution Approach 1:
The wafer surface is segmented into alternating first areas and second areas with different surface charges. This segmentation creates distinct zones that guide nanotube placement, preventing random distribution and bundling by providing specific alignment regions separated by spacing regions.
Solution Approach 2:
Different areas of the wafer surface are given different local properties through varying surface charges. The first areas have one surface charge polarity while the second areas have the opposite polarity, creating local quality differences that direct nanotube alignment and placement precision.
2Manufacturing precision
If alternating areas with different surface charges are used, then nanotube alignment is improved, but the wafer manufacturing process becomes more complex
Solution Approach 1:
The alternating first and second areas with different surface charges are prepared in advance on the wafer surface before nanotube placement. This preliminary structuring of the substrate creates pre-defined alignment zones that guide nanotube positioning, eliminating the need for complex real-time alignment procedures.
Solution Approach 2:
The alternating charged areas act as an intermediary structure between the nanotubes and the substrate. This intermediate patterned surface charge distribution mediates the interaction between nanotubes and the substrate, providing electrostatic guidance for precise alignment while keeping the actual nanotube placement process relatively simple.
3Reliability
If random placement is used, then the process is simple, but variability in transistor formation increases
Solution Approach 1:
The alternating first and second areas create regions of different electrostatic potential that guide nanotube placement. By establishing these equipotential zones with opposite surface charge polarities, the system provides consistent electrostatic forces that reliably guide nanotube alignment, reducing variability in transistor formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach produces a highly ordered arrangement of carbon nanotubes, reducing variability in transistor formation and enabling precise control over the carbon nanotube pitch, which enhances the reliability and performance of carbon nanotube-based devices.
Implementation Method 1
wafers with alternating areas of different surface charges, where alignment areas with a specific polarity and spacing areas with a different polarity are arranged to guide the alignment of carbon nanotubes
Data Source
AI summary
Provided herein are wafers that can be used to align carbon nanotubes, as well as methods of making and using the same. Such wafers include alignment areas that have four sides and a surface charge, where the alignment areas are surrounded by areas that have a surface charge of a different polarity. Methods of the disclosure may include depositing and selectively etching a number of hardmasks on a substrate. The described methods may also include depositing a carbon nanotube on such a wafer.


