Printed Wiring Board Copper Foil Crystal Orientation
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Solution Overview
Problem
Copper foils in printed wiring boards face issues with mechanical characteristics like flexibility, leading to abnormal growth of copper crystals during electroplating, causing surface unevenness and erroneous detection in automated optical inspections, as well as peeling of via hole bottoms due to insufficient copper deposition.
Innovation Solution
The use of copper foils with crystal grains oriented in the (100) plane and an average size of 10 μm or greater, combined with an electroless copper plating layer containing palladium, which suppresses abnormal growth and ensures uniform deposition, preventing peeling and erroneous inspections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If copper foil with conventional crystal structure is used, then electroplating process is simple, but copper crystals abnormally grow causing surface unevenness and inspection errors
Solution Approach 1:
The invention changes the crystal grain parameters of copper foil by specifying (100) plane orientation and minimum 10 μm average size, which fundamentally alters the plating behavior to prevent abnormal crystal growth and surface unevenness during electrolytic copper plating
Solution Approach 2:
The invention performs preliminary action by pre-configuring the copper foil with specific crystal grain characteristics ((100) orientation and size ≥10 μm) before the plating process, ensuring that the subsequent electroless and electrolytic copper plating proceeds uniformly without abnormal crystal growth
2Strength
If copper foil with small crystal grain size is used, then mechanical flexibility is improved, but copper deposition becomes insufficient causing via hole bottom peeling
Solution Approach 1:
The invention changes the crystal grain size parameter to 10 μm or greater, which is sufficiently large to ensure adequate copper deposition and via hole bottom adhesion, while still maintaining acceptable mechanical flexibility for the application
3Manufacturing precision
If palladium stacking amount is too low, then cost is reduced, but abnormal crystal growth occurs causing inspection errors
Solution Approach 1:
The invention optimizes the palladium stacking amount parameter to the specific range of 0.03-0.15 μg/cm², which provides sufficient catalytic activity for uniform electroless copper plating while controlling material cost
Solution Approach 2:
The invention uses a minimal but sufficient amount of palladium (0.03-0.15 μg/cm²) that provides just enough catalytic function to ensure uniform electroless copper plating without excessive material consumption
4Productivity
If multi-layer structure with via holes is implemented, then wiring density is increased, but complexity of connecting different conductive layers increases
Solution Approach 1:
The invention segments the connection hole filling process into two distinct stages: electroless copper plating for the inner periphery and bottom, followed by electrolytic copper plating for the remaining space. This segmentation allows each process to optimize its function, achieving complete and uniform filling of via holes in multi-layer structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the mechanical properties of copper foils, reducing erroneous detection in automated inspections and preventing peeling of via hole bottoms, thereby improving the reliability of printed wiring boards.
Implementation Method 1
an electroless copper plating layer that is stacked on the inner periphery and the bottom of the connection hole
Implementation Method 2
an electrolytic copper plating layer that is stacked on a surface of the electroless copper plating layer
Implementation Method 3
The electroless copper plating layer includes palladium. A stacking amount of the palladium per unit area of a surface of each copper foil is 0.03 μg/cm2 to 0.15 μg/cm2
Data Source
AI summary
A printed wiring board includes a base layer having insulating properties, a first conductive layer directly or indirectly stacked on the base layer front surface, and including a copper foil, a second conductive layer directly or indirectly stacked on the base layer back surface, and including a copper foil, a stacked body for a via hole, the stacked body being stacked on an inner periphery and a bottom of a connection hole that extends through the first conductive layer and the base layer in a thickness direction, and being configured to electrically connect the first conductive layer and the second conductive layer to each other, and having an electroless copper plating layer. Each copper foil contains a copper crystal grain oriented in a plane orientation, and an average crystal grain size of copper of each copper foil is 10 μm or greater, the electroless copper plating layer includes palladium.