PCB Differential Line Capacitance Adjustment via Asymmetric Dummy Pattern
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Solution Overview
Problem
Conventional printed circuit boards face challenges in maintaining electrical balance of differential lines due to constraints on metal pattern installation, such as layer placement and size, which can lead to deterioration of electrical balance and increased noise resistance when high-density mounting is required.
Innovation Solution
A printed circuit board design that includes a line formation layer with a differential line, surge countermeasure components, and connection conductors, where the lengths of the conductors are adjusted to maintain capacitance differences within design targets, even when metal patterns cannot be optimized, by adjusting the lengths of the first and second conductors and their corresponding connection conductors relative to the ground layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If metal patterns are provided inside the dielectric to adjust capacitance difference, then electrical balance of differential line is improved, but device complexity and manufacturing constraints increase
Solution Approach 1:
The patent intentionally introduces asymmetry by adding a dummy metal pattern only to one of the differential conductors. This asymmetric modification changes the capacitance distribution to compensate for existing imbalances, thereby improving the electrical balance of the differential line without requiring complex symmetric modifications to both conductors
Solution Approach 2:
The patent modifies the capacitance parameter of the differential line by adding a dummy metal pattern. This changes the electrical characteristics of the line, specifically adjusting the capacitance difference between the two conductors to achieve better electrical balance and reduced signal integrity issues
2Productivity
If the number of board layers is reduced or high-density mounting is implemented, then productivity and compactness improve, but constraints on metal pattern installation increase
Solution Approach 1:
Instead of providing metal patterns for both differential conductors, the patent applies partial action by adding a dummy metal pattern only to one conductor. This sufficient but not excessive approach achieves the desired capacitance adjustment while leaving the other conductor unchanged, thereby reducing manufacturing complexity
Solution Approach 2:
The patent extracts the essential function of capacitance adjustment from a required symmetric metal pattern configuration and achieves it through a simplified asymmetric implementation. By taking out only the necessary dummy metal pattern rather than implementing a complete symmetric solution, the design achieves the same electrical balance improvement with reduced manufacturing constraints
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses common mode noise and radiation noise, improving noise resistance of the differential line by maintaining electrical balance despite constraints on metal pattern installation.
Implementation Method 1
a first capacitance exists between the first connection conductor as well as the first component and the ground layer, and a second capacitance exists between the second connection conductor as well as the second component and the ground layer
Data Source
AI summary
A printed circuit board includes a line formation layer including a differential line having a first conductor and a second conductor, a first component for a countermeasure against a surge, a first connection conductor having one end connected to the first conductor and another end connected to the first component, a second component for a countermeasure against a surge, a second connection conductor having one end connected to the second conductor and another end connected to the second component, a ground layer, and a dielectric mounted between the line formation layer and the ground layer. Lengths of the first conductor and second conductor are adjusted based on a difference of capacitance values in the circuit board.