Multi-layer PCB Layer Reduction via Low Dielectric Constant Insulation

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Solution Overview

Problem

Multi-layer printed circuit boards face challenges in maintaining signal transmission properties and high yield rates when thickness and/or number of layers are reduced, leading to increased production costs and decreased yield rates due to the need for higher precision and narrower trace widths.

Innovation Solution

A multi-layer printed circuit board design utilizing glass fiber cloth with a dielectric constant of 3.4 or less and trace widths between 40 and 75 micrometers, combined with a low dielectric constant resin composition, to achieve characteristic impedances between 45 and 55Ω in single-ended signaling and 90 and 110Ω in differential signaling, without excessively reducing trace widths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If the thickness of PCBs is reduced by using thinner prepregs, then the overall thickness of PCB products is reduced, but the manufacturing precision and yield rate decrease due to higher precision and narrower trace demands

Engineering Contradiction:
Improveoverall thickness of PCBVSAvoidyield rate
Core Design Contradiction:
Length of stationary objectVSManufacturing precision

Solution Approach 1:

The patent changes the dielectric constant parameter of the insulation layers to 3.4 or less, which allows maintaining characteristic impedance specifications with wider trace widths (40-75 micrometers) even in reduced-thickness PCBs. This parameter change resolves the contradiction by enabling thicker traces that are easier to manufacture with higher yield rates, while still achieving the required electrical performance in thinner boards.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If the number of layers is reduced to save production costs, then production costs decrease, but signal transmission functionality may be compromised

Engineering Contradiction:
Improveproduction costVSAvoidsignal transmission functionality
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

By reducing the dielectric constant of insulation layers to 3.4 or less, the patent enables maintaining proper characteristic impedance (45-55Ω single-ended, 90-110Ω differential) with wider trace widths. This allows layer reduction designs to achieve signal transmission functionality with fewer layers while keeping traces manufacturable at standard widths, thus reducing production costs without compromising signal transmission reliability.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If narrower trace widths are used to meet characteristic impedance specifications in reduced-thickness PCBs, then impedance control is improved, but manufacturing precision and yield rate decrease

Engineering Contradiction:
Improvecharacteristic impedance controlVSAvoidyield rate
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent changes the dielectric constant parameter of insulation layers to 3.4 or less, which fundamentally alters the impedance characteristics of the PCB structure. This parameter change allows achieving proper characteristic impedance control with wider trace widths (40-75 micrometers) in reduced-thickness PCBs, thereby maintaining impedance specifications while significantly improving yield rate by avoiding the need for extremely narrow traces that are difficult to manufacture.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enables high signal transmission functionality with a high yield rate and reduced production costs by maintaining desirable characteristic impedances while allowing for layer reduction, thereby decreasing the proportion of defective products and lowering overall production costs.

Implementation Method 1

the insulation layers have a dielectric constant of 3.4 or less

Methodology Applied
Scientific EffectDielectric constant: Dielectric Permittivity

Data Source

PatentUS9392683B2Multi-layer printed circuit boards having properties suitable for layer reduction design
Publication Date: 2016.07.12 ELITE MATERIAL
  • US9392683B2 patent drawing
  • US9392683B2 patent drawing
  • US9392683B2 patent drawing

AI summary

A multi-layer printed circuit board comprises: at least two insulation layers, respectively having glass fiber cloth and cured resin covering thereon, the insulation layers being stacked on each other; an internal trace layer formed between two neighboring insulation layers; and an external trace layer formed on an outer surface of the outermost insulation layer; wherein the insulation layers have a dielectric constant of 3.4 or less, and the internal and external trace layers have a trace width between 40 and 75 micrometers, such that the multi-layer printed circuit board has a characteristic impedance between 45 and 55Ω in single-ended signaling and between 90 and 110Ω in differential signaling.