PCB Metal Bump Integration for Solder Defect Reduction

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Solution Overview

Problem

Current soldering techniques using solder balls on printed circuit boards face challenges such as requiring precise matching of fine-size openings and pads, and are prone to short circuits, necessitating improved bonding methods.

Innovation Solution

A printed circuit board design incorporating a metal bump that is partially buried and partially protruding from an insulating layer, connected to a wiring layer, which simplifies the manufacturing process and eliminates the need for separate solder bumps, thereby preventing solder resist defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If solder balls are used for bonding, then electrical connection is achieved, but fine-size openings and pads must be precisely matched and short circuits may occur

Engineering Contradiction:
Improvematching precision of openings and padsVSAvoidshort circuit prevention
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent merges the bump structure and wiring layer into a single integrated component. The bump is formed as an integral part of the wiring layer through a unified plating process, eliminating the need for separate solder bump attachment and reducing alignment requirements between openings and pads.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The bump structure is formed in advance as part of the wiring layer during the PCB manufacturing process, before final assembly. This preliminary formation of the bump with its surrounding wiring layer integrates the connection structure early, avoiding later alignment issues with solder balls.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If separate solder bumps are used, then bonding is achieved, but additional manufacturing steps and potential misregistration defects occur

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidsolder resist alignment accuracy
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent combines the bump formation and wiring layer creation into a single plating process step. The bump and its surrounding wiring layer are formed simultaneously through electroplating or electroless plating, eliminating separate solder bump attachment steps and associated alignment requirements.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The plating process serves multiple functions: it forms the bump structure, creates the surrounding wiring layer, and establishes electrical connections all in one operation. This multi-functional approach simplifies manufacturing by consolidating multiple steps into a single process.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the bonding process by allowing for precise electrical connections without the need for separate solder bumps, reducing defects and simplifying the manufacturing process while preventing solder resist misregistration and non-development defects.

Implementation Method 1

a bump connected to the first wiring layer and protruding from a lower surface of the first insulating layer. The bump may include a first layer and a second layer disposed on a side surface of the first layer to surround the first layer

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS11552009B2Printed circuit board
Publication Date: 2023.01.10 SAMSUNG ELECTRO MECHANICS CO LTD
  • US11552009B2 patent drawing
  • US11552009B2 patent drawing
  • US11552009B2 patent drawing

AI summary

A printed circuit board includes: a first insulating layer; a first wiring layer disposed on one surface of the first insulating layer; and a bump at least partially disposed in the first insulating layer and connected to the first wiring layer. The bump at least partially protrudes from the other surface of the first insulating layer, opposite to the one surface of the first insulating layer.