PCB Pad Surface Layout for Thermal Cycle and Drop Reliability

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Solution Overview

Problem

The reliability of semiconductor packages is affected by the connection state between connection bumps and the semiconductor package, with issues such as cracks occurring in pad patterns and connection bumps, which need to be addressed to ensure stability and performance.

Innovation Solution

A printed circuit board design featuring pad patterns with different surface treatments based on their location, where edge and corner regions receive distinct treatments: edge regions are coated with a nickel/gold layer for improved thermal cycle reliability, and corner regions are coated with an organic solderability preservative (OSP) for enhanced drop reliability, thereby preventing cracks and improving overall reliability and electrical characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a uniform surface treatment is applied to all pad patterns, then the manufacturing process is simple, but the reliability under different stress conditions (thermal cycle and drop) is compromised

Engineering Contradiction:
Improvethermal cycle reliabilityVSAvoidsurface treatment complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies different surface treatments to different regions of the substrate based on their functional requirements. Edge pad patterns receive nickel/gold plating for thermal cycle reliability, while corner pad patterns receive OSP coating for drop reliability. This local differentiation resolves the contradiction by optimizing each region's surface treatment according to its specific stress exposure rather than applying a uniform treatment across the entire substrate.

Inventive Principle:
Principle #3Local quality

2Reliability

If different surface treatments are applied to different pad patterns, then overall reliability is improved, but the manufacturing process becomes more complex

Engineering Contradiction:
Improveoverall reliabilityVSAvoidsurface treatment process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The manufacturing process is segmented into region-specific treatment steps: edge pad patterns undergo nickel/gold plating while corner pad patterns receive OSP coating. This segmentation enables parallel processing of different regions with appropriate treatments, resolving the contradiction by organizing the manufacturing process around functional zones rather than requiring sequential complex operations across the entire substrate.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed design enhances both thermal cycle and drop reliability of semiconductor packages by preventing pattern cracks and ensuring the electrical performance of the semiconductor packages, thereby improving their durability and functionality.

Implementation Method 1

first pad patterns disposed in the first region and surface-treated with a nickel/gold (Ni/Au) layer

Methodology Applied
Scientific EffectOxidation prevention: Oxidation

Implementation Method 2

second pad patterns disposed in the second regions and surface-treated with an organic solderability preservative (OSP)

Methodology Applied
Scientific EffectOxidation prevention: Oxidation

Data Source

PatentUS20260020153A1Printed circuit board and semiconductor package using the same
Publication Date: 2026.01.15 SAMSUNG ELECTRONICS CO LTD
  • US20260020153A1 patent drawing
  • US20260020153A1 patent drawing
  • US20260020153A1 patent drawing

AI summary

Provided is a printed circuit board including a substrate structure having a first surface including a chip mounting region on which a semiconductor chip is mounted and a second surface opposite to the first surface, the second surface having a rectangular shape having a first edge, a second edge, a third edge, and a fourth edge and a first corner, a second corner, a third corner, and a fourth corner formed by the first to fourth edges, and pad patterns disposed on the second surface of the substrate structure, wherein the second surface includes a first region including a region corresponding to the chip mounting region and in contact with the first to fourth edges of the second surface, respectively, and second regions adjacent to the first to fourth corners of the second surface, respectively and spaced apart from each other by the first region, wherein the pad patterns include first pad patterns disposed in the first region and surface-treated with a nickel/gold (Ni/Au) layer, and second pad patterns disposed in the second regions and surface-treated with an organic solderability preservative.