PCB Pad Tapering for Via Fill Coupling
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Solution Overview
Problem
There is a growing demand for small and thin printed circuit boards with efficient via hole processing techniques that provide excellent electrical and mechanical properties, as electronic devices miniaturize and thin-film.
Innovation Solution
A printed circuit board design featuring an insulating layer with a pad and via fill, where the pad has a through hole that tapers towards the via hole, and the via hole is formed using a sandblasting process with abrasive materials to expose the pad's intermediate portion, allowing for improved coupling strength and electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the insulating layer is removed to form via holes exposing the pad, then electrical connectivity is improved, but the surface roughness increases and mechanical strength decreases
Solution Approach 1:
The pad is designed with a tapered intermediate portion that has different surface characteristics compared to other areas. This local variation in geometry allows the via hole to expose a controlled rough surface area specifically where needed for via fill anchoring, while maintaining smoother surfaces in other regions for electrical connectivity and signal integrity.
Solution Approach 2:
The pad's intermediate portion is pre-formed with a tapered shape and increased surface area before the via hole formation process. This preliminary structuring ensures that when the insulating layer is removed, the exposed pad surface already possesses the optimal roughness characteristics for via fill coupling, eliminating the need for additional surface treatment steps.
2Strength
If the pad surface area is increased to improve via fill coupling, then mechanical strength is improved, but the device complexity increases
Solution Approach 1:
The intermediate portion of the pad is formed with a tapered, curved geometry that gradually increases in surface area towards the via hole. This continuous curvature provides enhanced surface area for via fill coupling and mechanical strength while maintaining a simple, manufacturable form that does not require complex multi-step fabrication processes.
3Reliability
If the via hole is formed to expose the intermediate portion of the pad, then electrical connectivity is improved, but the insulating layer removal process becomes more difficult
Solution Approach 1:
The via hole formation process targets specifically the intermediate portion of the pad with localized abrasive blasting. This focused approach allows precise exposure of the tapered pad section needed for interlayer connection while minimizing unnecessary removal of surrounding insulating material, thereby simplifying the overall manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables reliable interlayer connections with enhanced mechanical and electrical properties, reducing signal loss and improving RF characteristics by forming via holes with low surface roughness and increasing the surface area for better coupling of the via fill to the pad.
Implementation Method 1
selectively removing the insulating layer using an abrasive material to form a via hole exposing an intermediate portion of the pad
Implementation Method 2
The via fill is formed in the via hole, configured to fill the through hole, and coupled to the intermediate portion
Data Source
AI summary
A printed circuit board includes an insulating layer, a pad, and a via fill. The insulating layer includes a via hole. The pad is formed in the insulating layer such that an intermediate portion thereof is exposed by the via hole. The pad includes a through hole formed in the intermediate portion. The via fill is formed in the via hole, configured to fill the through hole, and coupled to the intermediate portion.