Symmetrical PCB Post Bumps for Fine-Pitch Reliable Packaging
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Solution Overview
Problem
Existing package substrates face limitations in responding to fine pitches and are prone to issues like solder cracks, bridges, and collapse due to the use of solder balls, which also lead to warpage and reduced reliability.
Innovation Solution
A printed circuit board with symmetrical post bumps on both sides of an insulating layer, where each post bump is an electroplating layer formed using a seed layer, allowing for balanced upper and lower portion alignment and improved connection reliability, enabling fine pitch response and reduced warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If solder balls are used to connect substrates, then electrical connection is achieved, but fine pitch response is limited and reliability deteriorates due to solder cracks, bridges, and collapse
Solution Approach 1:
The invention extracts the problematic solder ball connection method and replaces it with post bumps formed through electroplating. The post bumps are created by forming holes in the substrate, filling them with conductive material, and electroplating to create precise, reliable connections that eliminate solder-related defects while enabling fine pitch applications
Solution Approach 2:
The invention changes the physical and material parameters of the connection structure by transitioning from spherical solder balls to cylindrical post bumps with controlled dimensions. The post bumps have specific height (50-200 μm) and diameter (10-50 μm) parameters that can be precisely controlled through electroplating, enabling fine pitch response and improved reliability
2Reliability
If solder balls are used for substrate connection, then electrical connection is established, but warpage occurs and durability is reduced
Solution Approach 1:
The invention removes the solder ball component entirely and replaces it with post bumps that are integrated into the substrate structure. This extraction eliminates the interface between separate solder and substrate materials, preventing warpage caused by thermal expansion differences and improving overall structural stability and durability
Solution Approach 2:
The invention merges the connection structure with the substrate by forming post bumps directly within holes in the substrate and electroplating them in place. This integration creates a unified structure where the connection element and substrate become one, eliminating separation issues and improving durability while preventing warpage
3Ease of manufacture
If separate seed layers are formed for post bumps, then electroplating is enabled, but manufacturing complexity increases and productivity decreases
Solution Approach 1:
The invention merges the seed layer formation with the pad structure by using the same pad material and formation process for both pads and post bump seed layers. This consolidation eliminates separate seed layer formation steps, simplifying the manufacturing process and improving productivity while maintaining the ability to perform electroplating for post bump creation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the ability to respond to fine pitches, minimizes warpage, improves connection reliability, and simplifies the manufacturing process by eliminating the need for separate seed layers, thereby increasing durability and productivity.
Implementation Method 1
a post bump disposed on an upper surface of the pad, wherein the post bump includes a first region disposed on the upper surface of the pad and a second region extending from the first region and disposed on the protective layer
Data Source
AI summary
A printed circuit board according to an embodiment includes an insulating layer; a first pad disposed on an upper surface of the insulating layer; a second pad disposed on a lower surface of the insulating layer; a first device mounted on the first pad; a second device mounted on the second pad; a first molding layer disposed on the insulating layer and molding the first device; and a second molding layer disposed on the lower surface of the insulating layer and molding the second device, wherein a lower surface of the second molding layer is positioned on the same plane as a lower surface of the second device.