Printed Wiring Board Resin Gradient Warpage Control
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Solution Overview
Problem
Existing printed wiring boards face challenges in controlling warpage and ensuring uniformity of solder bump heights due to variations in thermal expansion coefficients, leading to inconsistent connection reliability with IC chips and motherboards.
Innovation Solution
A printed wiring board design featuring a core substrate with alternately laminated resin insulating layers and conductor layers, where the volume percentage of resin in the upper resin insulating layer is greater than in the lower resin insulating layer by 0.5-5.0%, controlling warpage and thermal expansion coefficients to achieve consistent warpage direction and amount.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the resin insulating layers and conductor layers are alternately laminated with uniform resin content, then the manufacturing process is simple, but warpage occurs due to thermal expansion coefficient variations
Solution Approach 1:
The patent applies local quality by creating a resin content gradient within the laminated structure. Specifically, the resin insulating layer adjacent to the upper wiring part has a higher resin content (lower filler content) than the resin insulating layer adjacent to the lower wiring part. This localized variation in material composition allows differential thermal expansion compensation in different regions of the PCB, effectively controlling warpage while maintaining the overall laminated manufacturing process.
2Stability of the object's composition
If the resin volume percentage difference is increased to control warpage, then warpage control improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs parameter changes by optimizing the resin volume percentage difference to a specific range (0.5-5.0%). This quantitative parameter optimization balances warpage control effectiveness with manufacturing feasibility. The specified range is sufficient to achieve the desired warpage control while remaining within the capabilities of conventional manufacturing processes, thus avoiding excessive precision requirements.
3Reliability
If solder bump heights are made non-uniform to compensate for warpage, then connection reliability improves, but manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary action by controlling the warpage of the PCB substrate before the solder bump formation process. By pre-adjusting the substrate flatness through the resin content gradient design, the subsequent solder bump formation can proceed with uniform parameters, ensuring consistent bump heights. This eliminates the need for complex post-processing or variable parameter bump formation, thereby maintaining manufacturing simplicity while achieving reliable connections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces warpage and ensures uniform solder bump heights, enhancing connection reliability between the printed wiring board and IC chips, as well as between the board and motherboards, by managing thermal expansion differences.
Implementation Method 1
variations in thermal expansion coefficients, leading to inconsistent connection reliability
Data Source
AI summary
A printed wiring board includes a core substrate including a resin insulating layer and multiple conductor layers, a first wiring structure formed on a first surface of the core substrate and including a conductor layer and a resin insulating layer, and a second wiring structure formed on a second surface of the core substrate and including a conductor layer and a resin insulating layer. The core substrate is interposed between the first wiring structure and the second wiring structure such that the resin insulating layers and conductor layers in the core substrate, first wiring structure and second wiring structure are alternately laminated, the resin insulating layer in the first wiring structure has a vol % of resin which is larger than a vol % of resin in the resin insulating layer in the second wiring structure such that a difference in the vol % of resin in the first and second wiring structures is in the range of from 0.5% to 5.0%.


