Printed Circuit Board Microcircuit Formation via Selective Etching
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Solution Overview
Problem
Conventional circuit formation methods, such as semi-additive process (SAP) and modified semi-additive process (MSAP), face limitations in implementing microcircuits with line/space dimensions of approximately several microns due to resolution constraints of exposure equipment and seed etching processes.
Innovation Solution
A method involving the formation of first and second metal patterns on a substrate, followed by selective etching and the deposition of insulating layers, allowing for the creation of microcircuits with precise line/space dimensions without the need for a separate seed etching process, enabling the formation of microcircuits with line/space of 10 μm/10 μm or less, 5 μm/5 μm or less, or 2 μm/2 μm or less.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional circuit formation methods (SAP, MSAP) are used, then the manufacturing process is relatively simple, but the manufacturing precision of microcircuits cannot achieve 10 μm/10 μm or less due to exposure equipment resolution limits and seed etching process margins
Solution Approach 1:
The patent segments the circuit formation process into multiple distinct stages: forming first metal patterns, depositing metal layer, forming second metal patterns, selective etching, and insulating layer formation. This segmentation allows each stage to be optimized independently, achieving 10 μm/10 μm or less precision without relying on single-process limitations of conventional SAP or MSAP methods.
Solution Approach 2:
The patent performs preliminary actions by pre-forming first metal patterns and metal layers before final circuit pattern definition. The first metal patterns serve as preliminary structures that guide subsequent metal layer deposition and second metal pattern formation, enabling precise microcircuit formation without requiring high-resolution exposure equipment for the final pattern.
2Manufacturing precision
If exposure equipment resolution is increased to achieve finer line/space dimensions, then manufacturing precision improves, but device complexity and manufacturing cost increase significantly
Solution Approach 1:
The patent replaces the mechanical/optical exposure system with a multi-step metallization and etching system. Instead of relying on exposure equipment resolution to define final circuit dimensions, the invention uses sequential metal pattern formation and selective etching processes, substituting complex optical systems with more controllable metallization processes that can achieve 10 μm/10 μm or less precision with standard equipment.
3Manufacturing precision
If seed etching process margins are reduced to achieve better precision, then manufacturing precision improves, but reliability deteriorates due to process variability
Solution Approach 1:
The patent performs preliminary metal layer deposition and first metal pattern formation before final circuit definition, creating buffer structures that eliminate the need for aggressive seed etching margins. The pre-formed metal layers provide structural support and guidance, allowing final etching to proceed with larger process windows and improved reliability while maintaining 10 μm/10 μm or less precision.
Solution Approach 2:
The patent incorporates beforehand cushioning by forming multiple metal layers and patterns that act as protective buffers during subsequent etching processes. The first metal patterns and intermediate metal layers provide structural cushioning that prevents process variability from affecting final circuit dimensions, ensuring both precision and reliability simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach overcomes the resolution limitations of existing methods, enabling the easy formation of microcircuits with precise dimensions, enhancing the capability to produce highly integrated printed circuit boards for 5G high-speed communication and artificial intelligence applications.
Implementation Method 1
etching a portion of the metal layer to expose at least a portion of each of the plurality of first metal patterns from the metal layer
Implementation Method 2
The connection via is tapered to substantially decrease a width in a direction from a surface contacting the second wiring layer to a surface contacting the first wiring layer
Data Source
AI summary
A printed circuit board including a first insulating layer; a plurality of first circuit patterns respectively disposed on the first insulating layer; and a plurality of second circuit patterns respectively disposed on the first insulating layer and respectively having a thickness, thinner than a thickness of each of the plurality of first circuit patterns. At least one of the plurality of first circuit patterns and at least one of the plurality of second circuit patterns are alternately and repeatedly arranged, and a method for manufacturing the printed circuit board, are provided.