Stubless Plated Through Holes with Wrapping Structures
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Solution Overview
Problem
Printed circuit boards (PCBs) face challenges in removing stubs from vias, which generate noise under high-frequency applications, as existing methods are inefficient in forming stub-less plated through-holes, affecting signal integrity and performance.
Innovation Solution
A multilayer structure for PCBs is developed, including conductive and insulating layers with a secondary material layer that allows for selective removal and plating, using a drilling tool with a shadow layer and back drilling to create recesses for metallization, and electroplating to form stub-less plated through-holes with a plated wrapping structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional via formation methods are used, then manufacturing simplicity is maintained, but stubs remain in vias causing noise under high-frequency applications
Solution Approach 1:
The via formation process is divided into multiple sequential steps: initial via drilling, secondary material layer deposition, selective removal to create recesses, and electroplating. This segmentation allows each step to be optimized independently, ensuring complete stub removal while maintaining manufacturing feasibility through standardized process stages.
Solution Approach 2:
A secondary material layer is deposited on the via walls before the electroplating step. This preliminary action creates a removable barrier layer that enables complete plating coverage and facilitates subsequent stub removal, ensuring that the electroplating process can access all via surfaces for thorough metallization.
2Reliability
If stubs are removed from vias, then signal integrity is improved, but manufacturing precision requirements increase
Solution Approach 1:
The secondary material layer serves as an intermediary substance that simplifies the precision requirements. By depositing this layer first and then selectively removing it to create recesses, the process transforms the difficult task of precise stub removal into a simpler two-step operation (deposit then remove), reducing the direct precision burden on the via formation process.
Solution Approach 2:
The process replaces complex mechanical stub removal operations with a chemical/electrochemical approach. Instead of mechanically removing stubs through precise drilling or grinding, the method uses electroplating to deposit metal that displaces and removes stubs chemically, reducing the precision requirements for mechanical operations.
3Reliability
If plated wrapping structure is formed around conductive traces, then electrical connection is improved, but process complexity increases
Solution Approach 1:
The plated wrapping structure extends plating from the traditional one-dimensional via wall surface into the second dimension by wrapping around conductive traces. The recesses created by secondary material removal enable plating to protrude beyond the via walls and conform to trace geometries, adding dimensional complexity to the plating structure and improving electrical connections.
Solution Approach 2:
The electroplating process applies different plating characteristics to different locations: the via walls receive standard plating, while the recess areas receive enhanced plating that wraps around conductive traces. This local quality variation ensures optimal electrical connections at critical interfaces without requiring uniform process complexity throughout the entire via structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively removes stubs, reduces noise, and enhances signal integrity by creating stub-less plated through-holes with improved electrical connections, suitable for high-speed digital and RF applications.
Implementation Method 1
electroplating a first conductive layer into the through-hole over the shadow layer on both the edge and the surface of the at least one conductive trace or terminating land
Data Source
AI summary
A multilayer structure for a printed wiring board (PWB) includes a plurality of insulating layers interleaved with a plurality of conductive layers including one or more inner conductive layers, a top conductive layer, and a bottom conductive layer. The multilayer structure also includes at least one through-hole through the plurality of insulating layers and the plurality of conductive layers. The multilayer structure also includes at least one secondary material layer formed on at least one inner conductive trace or a terminating land having a surface and an edge near one of the at least one through-hole, the at least one secondary material layer after being removed partially defining a recess that allows plating on both the edge and the surface of the at least one inner conductive trace or the terminating land. The at least one through-hole includes a first plated segment seamless connected to a second plated segment wrapped over the edge of the at least one inner conductive trace or terminating land and extending at least a portion of the surface of the at least one inner conductive trace or terminating land.