PCB Thermal Land Gap Design for Solder Rise
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Solution Overview
Problem
In printed circuit boards, the heat escape from molten lead-free solder through conductor patterns causes it to solidify before reaching the prescribed level, especially with broad conductor patterns, leading to inadequate solder rise and potential defective connections, and existing solutions like bent lead pins or reduced thermal land areas are either ineffective or increase production complexity.
Innovation Solution
A printed circuit board design with varying through-hole diameters and conductor pattern areas, where the gap between through-holes and lead pins is adjusted based on the conductor pattern type, and thermal lands on outer layers include teardrop regions to reduce heat escape, while inner layers have direct connections without teardrop regions to enhance solder rise without increasing production processes or degrading component strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If thermal lands are formed between through-holes and conductor patterns to prevent heat escape, then solder heat retention is improved, but heat escape through broad conductor patterns increases when conductor pattern area is large
Solution Approach 1:
The patent applies different gap sizes between thermal lands and conductor patterns based on the specific conductor pattern area. For broad conductor patterns (power supply/grounding), a larger gap is provided to reduce heat escape, while for smaller conductor patterns, a standard gap is sufficient. This local differentiation resolves the contradiction by tailoring the heat isolation measure to the specific thermal characteristics of each conductor pattern.
Solution Approach 2:
The patent changes the gap dimension parameter between thermal lands and conductor patterns based on conductor pattern area. By making the gap width a variable parameter rather than a fixed value, the design optimizes heat retention for each conductor pattern type, preventing excessive heat escape through broad patterns while maintaining adequate heat isolation for smaller patterns.
2Temperature
If thermal land areas are reduced or linear regions are decreased to prevent solder heat escape, then solder heat retention is improved, but current-carrying capacity between through-holes and conductor patterns is compromised
Solution Approach 1:
The patent applies different gap sizes between thermal lands and conductor patterns based on the specific conductor pattern area. For broad conductor patterns (power supply/grounding), a larger gap is provided to reduce heat escape, while for smaller conductor patterns, a standard gap is sufficient. This local differentiation resolves the contradiction by tailoring the heat isolation measure to the specific thermal characteristics of each conductor pattern.
Solution Approach 2:
The patent changes the gap dimension parameter between thermal lands and conductor patterns based on conductor pattern area. By making the gap width a variable parameter rather than a fixed value, the design optimizes heat retention for each conductor pattern type, preventing excessive heat escape through broad patterns while maintaining adequate heat isolation for smaller patterns.
3Temperature
If bent lead pins are used to contact land regions to transfer heat and prevent solder temperature drop, then solder heat retention is improved, but production process complexity increases
Solution Approach 1:
The patent extracts the heat transfer function from the lead pin configuration and relocates it to the PCB structure itself through thermal lands and gap design. Instead of modifying the lead pins to achieve heat transfer, the design uses the PCB's thermal land geometry to control heat flow, thereby eliminating the need for bent lead pins while maintaining solder heat retention.
Solution Approach 2:
Instead of modifying the lead pin (active component) to solve the heat retention problem, the patent inverts the approach by modifying the PCB structure (passive component) through thermal land design. The solution moves from component-level modification to substrate-level design, simplifying the overall manufacturing process.
4Manufacturing precision
If through-hole diameters are made uniform and slightly larger than lead pin diameters, then manufacturing consistency is improved, but solder rise property deteriorates due to insufficient gap size
Solution Approach 1:
The patent applies different gap sizes between thermal lands and conductor patterns based on the specific conductor pattern area. For broad conductor patterns (power supply/grounding), a larger gap is provided to reduce heat escape, while for smaller conductor patterns, a standard gap is sufficient. This local differentiation resolves the contradiction by tailoring the heat isolation measure to the specific thermal characteristics of each conductor pattern.
Solution Approach 2:
The patent changes the gap dimension parameter between thermal lands and conductor patterns based on conductor pattern area. By making the gap width a variable parameter rather than a fixed value, the design optimizes heat retention for each conductor pattern type, preventing excessive heat escape through broad patterns while maintaining adequate heat isolation for smaller patterns.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design ensures molten solder rises to the prescribed level, improving solder rise properties and preventing connection issues while maintaining electronic component strength and reducing production complexity.
Implementation Method 1
the heat of the molten lead-free solder escapes via the conductor patterns connected to the through-holes
Implementation Method 2
the soldering is achieved by causing the molten lead-free solder to rise into (fill) the gaps between the through-holes and the lead pins
Data Source
AI summary
In a printed circuit board on which a first conductor pattern, a second conductor pattern of smaller area than the first conductor pattern and electronic components are mounted, a gap between a first through-hole connected to the first conductor pattern and a first lead pin inserted therein is defined to be larger than that between a second through-hole connected to the second conductor pattern and a second lead pin. With this, it becomes possible to improve solder rise property, without increasing the number of electronic component production processes or degrading strength with respect to the electronic component.


