PCB Through Region for Encapsulant Void Prevention

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Solution Overview

Problem

Void formation in the encapsulant between semiconductor chips and printed circuit boards (PCBs) during the molding process, which affects the quality and reliability of semiconductor packages.

Innovation Solution

Incorporating a through region with multiple through holes at the peripheral portion of the PCB, opposite to the encapsulant injecting port, to facilitate the flow of encapsulant and prevent void formation, while also enhancing design flexibility for connection pads and terminals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a bump is used as the connection terminal to connect the PCB and semiconductor chip, then the size of the semiconductor package is reduced, but a void can be formed in the encapsulant

Engineering Contradiction:
Improvesize of semiconductor packageVSAvoidvoid formation in encapsulant
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The invention divides the PCB structure by introducing through-holes that segment the encapsulant flow path into multiple channels, allowing the encapsulant to flow more uniformly and preventing void formation while maintaining the compact bump connection design

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The through-holes act as intermediary structures that facilitate encapsulant flow and provide pathways for air evacuation, serving as a mediator between the bump connection terminals and the encapsulant filling process to prevent void formation

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the through region is provided at the outermost portion of the board body opposite to the encapsulant injecting port, then the encapsulant flow is improved and void formation is reduced, but the design flexibility for connection pads and terminals is constrained

Engineering Contradiction:
Improveencapsulant flow and void preventionVSAvoiddesign flexibility for connection pads and terminals
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The invention applies local quality by providing through-holes specifically at the outermost portion opposite the injecting port where they are most effective for encapsulant flow, while other regions of the PCB maintain full design flexibility for connection pads and terminals

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces or prevents void formation in the encapsulant, improving the quality and reliability of semiconductor packages by ensuring better encapsulant flow and flexibility in terminal arrangements, thus enhancing the overall performance and manufacturing efficiency.

Implementation Method 1

to facilitate the flow of encapsulant and prevent void formation

Methodology Applied
Scientific EffectFluid flow:

Data Source

PatentUS9431272B2Printed circuit board including through region and semiconductor package formed by using the same
Publication Date: 2016.08.30 SAMSUNG ELECTRONICS CO LTD
  • US9431272B2 patent drawing
  • US9431272B2 patent drawing
  • US9431272B2 patent drawing

AI summary

Provided is a printed circuit board (PCB). The PCB includes a board body that includes a first surface and a second surface opposite the first surface, a semiconductor chip mounting region that is disposed on the first surface of the board body, and includes a plurality of semiconductor chip mounting parts on which a semiconductor chip may be mounted, a through region that is disposed at a peripheral portion of the semiconductor chip mounting region, and includes a plurality of through holes passing through the board body, and an external terminal forming region that is disposed on the second surface of the board body, wherein a plurality of external terminal forming parts are disposed at the external terminal forming region in correspondence with the respective semiconductor chip mounting parts.