PCB Vertical Conductive Structure Layout for High-Speed Impedance Matching
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Solution Overview
Problem
Existing vertical conductive structures (VeCSs) in printed circuit boards (PCBs) face issues with signal integrity degradation due to improper impedance matching, particularly at high signal speeds exceeding 16.0 gigatransfers per second (GT/s) per lane, leading to signal reflections and errors.
Innovation Solution
The implementation of vertical conductive structures (VeCSs) with controlled impedance through optimized geometries, including flat vertical signal and reference traces, and strategic placement of signal ground planes, to mitigate impedance mismatches and reflections, enhancing signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional vias are used for vertical connections, then manufacturing is simpler, but signal integrity degrades at high speeds due to impedance mismatch
Solution Approach 1:
The vertical conductive structure is segmented into multiple planar trace sections arranged vertically, with each section forming a controlled impedance transmission line segment. These segments are separated by dielectric layers and connected through vias, creating a distributed structure that maintains signal integrity while using conventional manufacturing processes.
Solution Approach 2:
The invention transitions from a three-dimensional via structure to a predominantly two-dimensional planar trace structure that is stacked across multiple layers. This dimensional transformation allows the use of standard PCB fabrication techniques while achieving controlled impedance characteristics that preserve signal integrity at high speeds.
2Reliability
If via structures are replaced with vertical conductive structures, then signal integrity improves, but manufacturing complexity increases
Solution Approach 1:
The vertical conductive structure serves multiple functions: it provides controlled impedance for high-speed signals, maintains electrical connectivity across layers, and can be integrated with existing PCB manufacturing processes. The structure combines planar transmission line characteristics with vertical interconnection functionality.
Solution Approach 2:
The invention changes the geometric parameters of the conductive path from cylindrical (via) to planar traces with specific width, spacing, and layer separation dimensions. These parameter adjustments enable controlled impedance while remaining compatible with standard PCB fabrication capabilities.
3Manufacturing precision
If vertical conductive structures are used, then impedance control improves, but device complexity increases
Solution Approach 1:
The vertical reference trace is positioned adjacent to the signal trace and maintained at a constant potential (typically ground), creating an equipotential reference plane. This configuration establishes a controlled impedance environment by providing a stable reference for the signal trace throughout its vertical path.
Solution Approach 2:
The vertical conductive structure replicates the controlled impedance characteristics of traditional planar transmission lines in a vertical configuration. Each segment of the vertical structure copies the impedance-control principles of horizontal traces, adapting them to the vertical interconnection context.
Data Source
AI summary
A printed circuit board (PCB), vertical conductive structures (VeCSs) for the PCB, and a method of fabricating a printed circuit board (PCB). The VeCS includes a VeCS slot at least partially defined in a dielectric substrate. A vertical signal trace is positioned on a first side of the VeCS slot and a vertical reference trace is positioned on a second side of the VeCS slot opposite the vertical signal trace. The VeCS has a predetermined impedance. A plurality of signal ground planes is positioned at a respective predetermined distance from the vertical signal trace. Each signal ground plane defines a cutout.