PCB Via Filling with Dual Grain Structure

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Solution Overview

Problem

Current technologies face challenges in forming large-sized filled-type vias on printed circuit boards due to issues with voids and dimples, which affect reliability, heat dissipation, signal delivery, and require additional processes like etching to reduce metal layer thickness.

Innovation Solution

A printed circuit board design featuring a via structure with a first metal layer and a second metal layer, where the average grain sizes differ, filled using pulse periodical reverse (PPR) and direct current (DC) plating to prevent voids and dimples, allowing for reduced plating thickness and simplified manufacturing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If large-sized filled-type vias are formed using conventional technologies, then heat dissipation properties are improved, but voids and dimples occur reducing reliability

Engineering Contradiction:
Improveheat dissipation propertiesVSAvoidreliability
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The via filling metal layer is divided into multiple layers (first via filling metal layer and second via filling metal layer) with different grain structures. The first layer has fine grains for preventing voids and dimples, while the second layer has coarse grains for heat dissipation, resolving the contradiction between reliability and heat dissipation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the via filling structure have different grain sizes tailored to specific functions. The lower portion (first layer) has fine grains for structural integrity and void prevention, while the upper portion (second layer) has coarse grains for heat dissipation, applying local quality to resolve the contradiction.

Inventive Principle:
Principle #3Local quality

2Temperature

If vias are formed to extend onto the board for heat dissipation, then heat dissipation properties are improved, but metal layer thickness increases requiring additional etching processes

Engineering Contradiction:
Improveheat dissipation propertiesVSAvoidmanufacturing processes
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The grain size parameter is changed between layers (fine grains in first layer, coarse grains in second layer) to achieve different functions. This parameter variation allows the metal layer to provide both structural integrity and heat dissipation without requiring additional etching processes to reduce thickness.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If uniform grain structure is used in via filling, then manufacturing is simplified, but voids and dimples occur reducing reliability

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidreliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The via filling metal layer is segmented into multiple layers with different grain structures. The first layer uses fine grains formed by specific plating conditions to prevent voids and dimples, while the second layer uses coarse grains for heat dissipation, maintaining manufacturing feasibility while improving reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Plating parameters are changed between layers to achieve different grain sizes. The first layer is formed with parameters that produce fine grains for reliability, while the second layer uses parameters for coarse grains and heat dissipation, resolving the contradiction between manufacturing simplicity and reliability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents voids and dimples, enhancing the reliability and heat dissipation properties of the board, enabling rapid signal delivery without the need for additional etching processes, thus reducing manufacturing costs and complexity.

Implementation Method 1

filled using pulse periodical reverse (PPR) and direct current (DC) plating

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS11737210B2Printed circuit board
Publication Date: 2023.08.22 SAMSUNG ELECTRO MECHANICS CO LTD
  • US11737210B2 patent drawing
  • US11737210B2 patent drawing
  • US11737210B2 patent drawing

AI summary

A printed circuit board includes an insulating layer; a metal pad disposed on one side of the insulating layer; a via hole penetrating through the insulating layer to expose at least a portion of the metal pad; and a via filling at least a portion of the via hole, wherein the via comprises a first metal layer and a second metal layer disposed on the first metal layer, and an average size of grains in the first metal layer and an average size of grains in the second metal layer are different from each other.