Multilayer PCB Ground Power Via Grid for High-Frequency Noise
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Solution Overview
Problem
High-frequency IC chips above 3 GHz experience increased noise and malfunction due to high loop inductance in multilayer printed wiring boards, leading to operational failures such as delayed recognition, switch changes, and data transmission issues.
Innovation Solution
The multilayer printed wiring board design incorporates a core substrate with ground and power through holes disposed in a grid or staggered formation to cancel induced electromotive forces, reducing mutual inductance and loop inductance, thereby stabilizing the voltage supply to the IC chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional through hole arrangements are used in multilayer printed wiring boards, then manufacturing is simplified, but loop inductance increases causing malfunction at high frequencies
Solution Approach 1:
The through holes are segmented into distinct power through holes and ground through holes arranged in a specific pattern. This segmentation allows the power and ground paths to be separated and controlled independently, enabling the cancellation of induced electromotive forces and reduction of loop inductance, thereby improving operational reliability at high frequencies
Solution Approach 2:
The invention uses a replicated pattern of alternating power and ground through holes. This copying approach creates multiple identical current loops that cancel each other's electromagnetic interference, reducing overall loop inductance while maintaining a systematic and manufacturable structure
2Reliability
If through holes are arranged to reduce loop inductance, then high frequency operation becomes possible, but manufacturing precision requirements increase
Solution Approach 1:
The invention extracts and emphasizes the critical arrangement pattern of power and ground through holes as a separate design element. By focusing on this specific geometric configuration rather than treating all through holes uniformly, the design achieves high frequency performance while providing clear manufacturing guidelines that balance precision requirements with manufacturability
3Object-affected harmful factors
If power through holes and ground through holes are disposed adjacently in grid or staggered formation, then induced electromotive forces cancel out reducing noise, but the through hole density increases
Solution Approach 1:
The invention merges power through holes and ground through holes into a unified alternating pattern. This combining approach allows the two types of through holes to work together synergistically, where the adjacent arrangement enables electromagnetic cancellation of noise while the integrated pattern optimizes space utilization, effectively managing the through hole density
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures stable voltage supply to the IC chip, preventing malfunction and delay, even at high frequencies, by effectively reducing loop inductance and enhancing electric characteristics and reliability.
Implementation Method 1
induced electromotive forces cancel out each other because the directions of the induced electromotive forces are opposite
Implementation Method 2
mutual inductance can be reduced. Then, loop inductance of a printed wiring board decreases
Data Source
AI summary
In a core substrate 30, a ground through hole 36E and a power through hole 36P are disposed in the grid formation, so that electromotive force induced in X direction and Y direction cancel out each other. As a result, even if mutual inductance is reduced and a high frequency IC chip is loaded, electric characteristic and reliability can be improved without generating malfunction or error.