Multilayer PCB Via Hole Registration via Dual Drilling and Plating
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Solution Overview
Problem
Multilayer printed circuit boards (PCBs) face misalignment issues during the lamination process, leading to signal integrity problems and the need for larger pads/anti-pads, which restricts the minimum size and consistency of these features across multiple layers.
Innovation Solution
The dual via plating approach, where via holes are pre-formed and plated in individual layers before lamination, and then backdrilled and plated again to ensure consistent distance to adjacent conductive features, reducing misalignment errors and allowing for smaller pad sizes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If via holes are drilled after lamination of multiple layers, then the process is simpler and faster, but misalignment among layers occurs leading to larger pad sizes and signal integrity problems
Solution Approach 1:
The via hole formation process is segmented into multiple stages: drilling individual via holes in each layer before lamination, then backdrilling through the laminated structure. This segmentation allows precise alignment to be established at the individual layer level before final assembly, resolving the contradiction between production speed and alignment accuracy.
Solution Approach 2:
Via holes are pre-drilled and plated in individual layers before the lamination process occurs. This preliminary action ensures that alignment is established while layers are still separate and easier to position accurately, eliminating misalignment issues that would occur if drilling were performed after lamination.
2Manufacturing precision
If larger pads and anti-pads are used to compensate for misalignment, then via hole alignment tolerance is improved, but the minimum size of pads is restricted and signal integrity deteriorates
Solution Approach 1:
The alignment process is segmented to occur at the individual layer level before lamination, rather than relying on large tolerance zones after assembly. This allows precise pad positioning without requiring oversized pads, maintaining signal integrity while achieving the necessary alignment tolerance.
Solution Approach 2:
Alignment marks and via hole positions are preliminarily established on individual layers before lamination. This preliminary positioning ensures that when layers are assembled, the via holes align accurately with pads without requiring excessive pad size, thus maintaining signal integrity.
3Ease of manufacture
If misalignment among layers is accepted, then the manufacturing process remains simple, but pad size flexibility is reduced and signal integrity problems occur
Solution Approach 1:
Alignment marks are preliminarily placed on individual layers before lamination, and via holes are drilled based on these marks. This preliminary alignment action maintains manufacturing simplicity while ensuring accurate via hole positioning, thereby preserving signal integrity without complicating the overall process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method improves signal integrity by maintaining consistent distances to adjacent traces, enabling the use of smaller pads/anti-pads and reducing errors in via hole formation, particularly beneficial for high-frequency applications.
Implementation Method 1
drilled and plated to form via segments
Data Source
AI summary
A method of making printed circuit board vias using a double drilling and plating method is disclosed. A first hole is drilled in a core, the first hole having a first diameter. The first hole is filled and/or plated with an electrically conductive material. A circuit pattern may be formed on one or two conductive layers of the core. A multilayer structure may then be formed including a plurality of cores that also include pre-drilled and plated via holes, wherein at least some of the pre-drilled and plated via holes are aligned with the first hole. A second hole is then drilled within the first hole and the aligned pre-drilled and plated holes, the second hole having a second diameter where the second diameter is smaller than the first diameter. A conductive material is then plated to an inner surface of the second hole.