PCB Via Hole Routing for Semiconductor Module Miniaturization

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Solution Overview

Problem

The increasing complexity of semiconductor packages requires more efficient routing of conductive lines on printed circuit boards (PCBs), as conventional PCB designs face space constraints due to the growing number of power and signal lines, limiting the miniaturization and integration of semiconductor modules.

Innovation Solution

The design incorporates a substrate with multiple layers of via holes and terminal pads, where conductive connection members fill the via holes and connect to terminal pads, allowing conductive lines to pass through between pad sets, thereby providing additional routing space and enabling smaller, thinner, and lighter semiconductor packages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If more power and signal lines are added to the PCB, then the electrical connection capability is improved, but the routing space becomes insufficient

Engineering Contradiction:
Improveelectrical connection capabilityVSAvoidrouting space
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent transitions from planar routing to three-dimensional routing by utilizing via holes that extend through the PCB substrate. Conductive lines are routed both on the surface and through the substrate via these via holes, effectively adding a vertical dimension to the routing space. This allows additional power and signal lines to be accommodated without increasing the PCB's footprint area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the PCB is made smaller to accommodate miniaturized semiconductor packages, then the integration density is improved, but the routing capacity is reduced

Engineering Contradiction:
ImprovePCB sizeVSAvoidrouting capacity
Core Design Contradiction:
Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The patent embeds conductive lines within the via holes of the PCB substrate, creating a nested structure where routing paths are contained within the substrate thickness rather than occupying additional planar space. This nesting approach allows the PCB to maintain a compact footprint while accommodating increased routing capacity through the utilization of the substrate's internal three-dimensional space.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Ease of manufacture

If conventional PCB designs are used, then the manufacturing simplicity is maintained, but the space for routing traces becomes insufficient

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidspace for routing traces
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent segments the routing function into two distinct locations: surface routing for external connections and internal via hole routing for connections through the substrate. This segmentation allows the PCB to maintain conventional simple surface routing processes while adding the capability to route lines through via holes, thereby increasing the total routing space without significantly complicating the manufacturing process.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8116093B2Printed circuit board and semiconductor module having the same
Publication Date: 2012.02.14 SAMSUNG ELECTRONICS CO LTD
  • US8116093B2 patent drawing
  • US8116093B2 patent drawing
  • US8116093B2 patent drawing

AI summary

A printed circuit board (PCB) includes a substrate having a first group of at least two via holes and a second group of at least two via holes formed therein, a first pad set of terminal pads and a second pad set of terminal pads formed on the substrate, and a first group of conductive connection members and a second group of conductive connection members formed in the substrate. The first group of the via holes are surrounded by the first pad set of the terminal pads and the second group of the via holes are surrounded by the second pad set of the terminal pads. The first and the second groups of conductive connection members fill up the first and second groups of the via holes. The first group of the conductive connection members are connected to the first pad set of the terminal pads and the second group of the conductive connection members are connected to the second pad set of the terminal pads.