PCIe Error Injection Platform for Server RAS Testing
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Solution Overview
Problem
Current methods for testing the reliability, availability, and serviceability (RAS) of server systems with PCIe devices are limited, as they lack the ability to inject both correctable and non-correctable errors effectively, and existing tools for error injection are costly.
Innovation Solution
A method and apparatus for injecting correctable and non-correctable errors into PCIe devices, involving a system with a control and testing system, a baseboard management controller, and error injection modules that select and inject specific error types based on type codes, generating reports in CSV or LOG format.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an ITP tool for injecting correctable errors is used, then error injection capability is improved, but cost increases significantly
Solution Approach 1:
The patent creates a software-based error injection tool that replicates the functionality of expensive hardware ITP tools. By copying the essential error injection capabilities into a software implementation, the system achieves comparable testing functionality at a fraction of the cost, eliminating the need for expensive dedicated hardware tools.
Solution Approach 2:
The patent replaces the mechanical/hardware-based ITP tool with a software-based solution. The error injection functionality that previously required specialized hardware is now implemented through software modules that can be integrated into existing testing frameworks, reducing dependency on expensive physical tools.
2Adaptability or versatility
If only correctable errors can be injected, then testing capability is limited, but system complexity remains low
Solution Approach 1:
The patent implements a universal error injection mechanism that can handle both correctable and non-correctable errors through a single software tool. The system provides multi-functional error injection capabilities by detecting error type characteristics and applying appropriate injection methods, eliminating the need for separate tools for different error types.
Solution Approach 2:
The patent changes the parameter of error type versatility by implementing a detection mechanism that identifies whether an error is correctable or non-correctable. Based on this parameter detection, the system dynamically adjusts its injection strategy, enabling comprehensive testing capability without proportionally increasing system complexity.
3Measurement precision
If existing error injection tools are used, then testing accuracy is maintained, but cost efficiency deteriorates
Solution Approach 1:
The patent employs a software-based error injection tool that is inexpensive compared to hardware ITP tools. The software solution can be deployed, used for testing, and modified or replaced more easily than hardware tools, providing cost-efficient testing without significantly compromising accuracy for typical testing scenarios.
Data Source
AI summary
A method for injecting specific errors of both correctable and non-correctable types into a PCIE device for testing purposes during fabrication stage constructs an error injecting platform based on received target information. The platform includes a control system and at least one testing system. Disabling a security boot in the connected testing system and obtaining information of the specified driver. The obtained information comprises objects to be tested according to selection, each object having a bus address and a PCIE port value. The object under test is controlled to inject a specified error, the injection and result of injection being reported by the processor and analyzed.


