PCIe Shunt Circuit for Direct Accelerator Linking

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Solution Overview

Problem

The existing configuration of connecting operation accelerators to a central processing unit (CPU) through PCIe links leads to severe traffic congestion and performance bottlenecks due to shared communication pathways among PCIe devices, such as operation accelerators, network controllers, and storage medium access controllers.

Innovation Solution

The implementation of a shunt circuit directly connected to PCIe devices through PCIe links, which translates addresses and transmits data through an internal bus, reducing the need for data to pass through the CPU and allowing direct communication between operation accelerators and PCIe devices, thereby alleviating traffic congestion and bandwidth conflicts on the PCIe link.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple PCIe devices (operation accelerator, network controller, storage medium access controller) communicate through a common PCIe link, then system integration is achieved, but severe traffic congestion occurs on the PCIe link

Engineering Contradiction:
Improvesystem integrationVSAvoidPCIe link throughput
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent segments the PCIe communication path by introducing a shunt circuit that creates separate direct connection paths between PCIe devices and the operation accelerator, bypassing the congested common PCIe link. This segmentation allows different data traffic to flow through different paths, resolving the traffic congestion while maintaining system integration.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The shunt circuit acts as an intermediary component that enables direct communication between PCIe devices and the operation accelerator without requiring all traffic to pass through the CPU. This intermediary structure reduces the burden on the common PCIe link and improves overall system throughput.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If all PCIe devices communicate through the CPU, then centralized control is maintained, but the CPU becomes a performance bottleneck

Engineering Contradiction:
Improvecentralized controlVSAvoidsystem processing speed
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The communication architecture is segmented into two paths: centralized CPU control for management tasks and direct peer-to-peer paths for data transfer. The shunt circuit enables the latter, allowing data-intensive operations to bypass the CPU and proceed directly between PCIe devices and the operation accelerator.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extracts the data transmission function from the CPU by introducing direct communication paths through the shunt circuit. This extraction allows the CPU to focus on control functions while data transfer is handled more efficiently through dedicated paths.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If data transmission passes through multiple components (CPU, PCIe link), then system coordination is achieved, but transmission delay increases

Engineering Contradiction:
Improvesystem coordinationVSAvoiddata transmission delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts unnecessary intermediate components from the critical data transmission path. By enabling direct communication between PCIe devices and the operation accelerator through the shunt circuit, the path is shortened and transmission delay is reduced while system coordination is maintained through the controller's arbitration logic.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11403250B2Operation accelerator, switch, task scheduling method, and processing system
Publication Date: 2022.08.02 HUAWEI TECH CO LTD
  • US11403250B2 patent drawing
  • US11403250B2 patent drawing
  • US11403250B2 patent drawing

AI summary

Examples in this application disclose an operation accelerator, a switch, and a processing system. One example operation accelerator includes a shunt circuit directly connected to a first peripheral component interconnect express (PCIe) device through a PCIe link. The shunt circuit is configured to receive first data sent by the first PCIe device through the PCIe link, and transmit the first data through an internal bus. A first address carried in the first data is located in a first range. In some examples of this application, the first PCIe device directly communicates with the operation accelerator through the shunt circuit in the operation accelerator.