Memory Controller Bit Reordering for Phase Change Memory Speed
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Solution Overview
Problem
Phase change memory (PCM) devices exhibit asymmetrical programming latencies between zero-bits and one-bits, leading to slower program speeds due to longer programming times for one-bits, which can dominate the average programming speed when both types are programmed together.
Innovation Solution
Encoding program bits to reduce the number of one-bits and changing the order of programming bits, such as writing all zero-bits before one-bits, to take advantage of the asymmetrical latencies and improve program speed by minimizing the number of one-bits and optimizing the programming sequence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If program bits are written in the order received without optimization, then the programming process is simple, but the average programming speed is reduced due to longer programming times for one-bits
Solution Approach 1:
The patent applies preliminary action by reordering the program bits before writing them to memory. Specifically, zero-bits are programmed first, followed by one-bits, rather than writing them in the order received. This preliminary reordering allows the system to take advantage of the shorter programming time for zero-bits, thereby improving overall program speed without adding significant complexity to the programming process
Solution Approach 2:
The patent segments the programming process into two distinct phases: first programming all zero-bits, then programming all one-bits. This segmentation allows the system to optimize each phase separately, taking advantage of the asymmetrical latencies by grouping identical bit types together, which improves throughput by reducing the impact of longer one-bit programming times
2Productivity
If encoding is used to reduce the number of one-bits, then program speed improves, but the encoding process adds complexity
Solution Approach 1:
The patent applies parameter changes by modifying the representation of data bits through encoding schemes that reduce the number of one-bits. By changing the parameter distribution of the bits (reducing one-bit count), the system exploits the asymmetrical programming latencies to achieve faster overall programming, as zero-bits can be programmed more quickly than one-bits
Data Source
AI summary
Subject matter disclosed herein relates to memory operations regarding changing an order of program bits to be programmed into a memory array.