Multi-bit Phase Change Memory Write Reference Voltage Ramping

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Solution Overview

Problem

Current multi-bit phase change memory (PCM) implementations are slow for reading and writing due to the use of analog-to-digital converters (ADCs) and digital-to-analog converters (DACs), which also require a large chip area.

Innovation Solution

A method for a multi-bit PCM that uses only DACs for read and write operations, employing a write-reference voltage that ramps incrementally over a write period and a read-reference voltage that ramps over a read period to store and retrieve information, eliminating the need for ADCs and reducing chip area by 10% or more.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If ADCs and DACs are used for read and write operations in multi-bit PCM, then data conversion functionality is achieved, but reading and writing speed deteriorates and chip area increases

Engineering Contradiction:

Improvereading and writing speedVSAvoiduse of ADCs and DACs

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The patent removes ADCs from the multi-bit PCM architecture, eliminating the analog-to-digital conversion step that was causing speed bottlenecks. The system uses only DACs for digital-to-analog conversion during write operations, while read operations directly compare the stored resistance value with reference values without requiring ADC conversion. This extraction of the ADC component resolves the technical contradiction by improving speed while reducing device complexity.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of converting the stored resistance value from analog to digital using ADCs during read operations, the patent inverts the approach by using digital reference values to directly compare with the analog resistance state. The ramp voltage is generated digitally and compared against the stored resistance, eliminating the need for ADCs and improving both speed and reducing chip area.

Inventive Principle:

Principle #13The other way round (Inversion)

2Area of stationary object

If ADCs and DACs are used for read and write operations in multi-bit PCM, then data conversion functionality is achieved, but chip area increases

Engineering Contradiction:

Improvechip areaVSAvoiduse of ADCs and DACs

Core Design Contradiction:

Area of stationary objectVSDevice complexity

Solution Approach 1:

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The DAC is designed to serve multiple functions: it generates reference voltages for both write operations and read operations, and it can operate in different modes (ramping up for write, ramping down for read). This multi-functionality eliminates the need for separate ADC and DAC circuits, significantly reducing chip area while maintaining full data conversion capability.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Quantity of substance

If multiple bits of information are stored in a single storage cell, then storage density improves, but reading and writing complexity increases

Engineering Contradiction:

Improvestorage densityVSAvoidread and write operation complexity

Core Design Contradiction:

Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent uses dynamic ramp voltage generation where the DAC produces a time-varying reference voltage that sweeps through multiple levels during write operations and reverses direction during read operations. This dynamic approach allows the system to encode multiple bits of information in a single storage cell by comparing the stored resistance against multiple reference levels, achieving high storage density while keeping the read/write circuitry relatively simple through the use of a single DAC.

Inventive Principle:

Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the speed of reading and writing operations while reducing the semiconductor chip area, making the multi-bit PCM more efficient and compact.

Implementation Method 1

a current is passed through a phase change material to melt it via internal joule heating

Methodology Applied

Scientific EffectJoule heating: Joule Heating

Implementation Method 2

Phase change materials can change between a crystalline state and amorphous state

Methodology Applied

Scientific EffectPhase change: Phase Change

Implementation Method 3

annealing it using electrical current

Methodology Applied

Scientific EffectAnnealing: Annealing

Data Source

PatentUS11152063B2Writing multiple levels in a phase change memory

Publication Date: 2021.10.19 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.