Phase Change Memory Global Bit Line Discharge Control
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Solution Overview
Problem
Phase change memory apparatuses face difficulties in smoothly discharging global bit lines during the deep power down mode, leading to extended discharge times, potential latch-up issues, and increased power-up times due to intercepted internal voltages.
Innovation Solution
A phase change memory apparatus with a global bit line and internal power generation circuit that integrates control over multiple bit lines, allowing for continuous internal voltage supply during deep power down mode, ensuring complete discharge of global bit lines and maintaining cell data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If internal voltages are intercepted simultaneously with the application of deep power down mode command, then current consumption is reduced to zero, but the discharge time of global bit lines is extended and cell data protection is compromised
Solution Approach 1:
The patent applies preliminary action by discharging the global bit line before intercepting the internal voltage when entering deep power down mode. The control circuit generates a discharge signal that activates the discharge switch to discharge the global bit line first, then after a predetermined time delay (ensuring complete discharge), the internal voltage is intercepted. This sequence prevents cell data loss while still achieving zero current consumption in deep power down mode.
2Loss of energy
If internal voltages are intercepted simultaneously with deep power down mode command, then power savings are achieved, but power-up time to return to normal operation is lengthened
Solution Approach 1:
The patent applies preliminary action by completing the global bit line discharge before intercepting the internal voltage. By ensuring the discharge process is fully completed beforehand (using a predetermined time delay), the system avoids the extended power-up time that would result from attempting to discharge already-intercepted voltages, thus achieving both power savings and fast power-up recovery.
3Speed
If global bit lines are discharged while internal voltages are intercepted, then discharge speed is improved, but this creates a conflict in deep power down mode operation
Solution Approach 1:
The patent applies dynamics by making the internal voltage supply state dynamic rather than fixed. The control circuit dynamically adjusts the internal voltage supply based on the operation mode: in normal mode, internal voltage is supplied continuously; in deep power down mode, internal voltage is intercepted only after global bit line discharge is complete. This dynamic control enables fast discharge when needed while achieving power savings when in deep power down mode, resolving the conflict between discharge speed and power consumption.
Data Source
AI summary
A phase change memory apparatus includes a global bit line and an internal power generation circuit. The global bit line is configured to integratedly control a plurality of bit lines. The internal power generation circuit is configured to supply an internal voltage while the global bit line is discharged and configured to control the internal voltage after the global bit line is discharged, when a deep power down mode signal is enabled.