Phase Change Memory Write Pulse Segmentation for Thermal Crosstalk
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Solution Overview
Problem
The existing phase change memory technologies face a thermal crosstalk problem during multi-valued storage due to excessive temperature rise caused by applying a single pulse with high amplitude and narrow pulse width, which affects the stability and accuracy of resistance value representation.
Innovation Solution
A data storage method for phase change memory that generates a write pulse signal comprising at least two contiguous pulses with equal intervals, determined based on the to-be-stored data, to reduce temperature increase and ease thermal crosstalk by applying these pulses to the storage unit, allowing for multi-valued storage without excessive heat generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single pulse with high amplitude and narrow pulse width is applied to implement multi-valued storage, then the storage density is improved, but the temperature rises excessively causing thermal crosstalk
Solution Approach 1:
The write pulse is divided into multiple contiguous sub-pulses instead of using a single high-amplitude pulse. Each sub-pulse has lower amplitude and contributes incrementally to the phase change, distributing the thermal energy over time and reducing peak temperature and thermal crosstalk while achieving the same multi-valued storage effect.
2Speed
If a single pulse with high amplitude is applied to achieve fast phase change, then the write speed is improved, but thermal crosstalk between adjacent storage units occurs
Solution Approach 1:
The write operation uses a periodic sequence of multiple contiguous sub-pulses with controlled intervals. This periodic action allows the material to undergo progressive phase change through each pulse while the intervals between pulses permit partial heat dissipation, preventing excessive thermal accumulation and reducing thermal crosstalk to adjacent storage units.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively lowers the temperature increase of the storage unit, reduces power consumption, and improves the stability of resistance value control, enabling reliable multi-valued storage by utilizing the amorphous states with different resistance values to represent various data bits.
Implementation Method 1
applying a pulse having a high amplitude and a narrow pulse width to the storage unit so that the storage unit changes to a high-resistance amorphous state
Implementation Method 2
a temperature of the storage unit rises excessively fast, causing a thermal crosstalk problem
Implementation Method 3
an erase process (or SET) and a write process (or RESET). The erase process is applying a pulse having a low amplitude and a long pulse width to a storage unit of the phase change memory so that the storage unit changes to a stable low-resistance crystalline state
Data Source
AI summary
A data storage method applying to a phase change memory and the phase change memory are provided. After obtaining to-be-stored data, the phase change memory (PCM) generates an erase pulse signal and a write pulse signal according to the to-be-stored data. The to-be-stored data is multi-bit data. The write pulse signal includes at least two contiguous pulses. Intervals between the at least two contiguous pulses are the same. The intervals between the at least two contiguous pulses have a value determined according to the to-be-stored data. The PCM applies the erase pulse signal to a storage unit of the PCM to enable the storage unit to change to a crystalline state. Further, the write pulse signal is applied to the storage unit to enable the storage unit to change to an amorphous state corresponding to a first resistance value, where the amorphous state represents the to-be-stored data.