Phase Change Memory Refresh Grouping by Erase Count
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Solution Overview
Problem
The resistance value drift in phase change memory cells, particularly in the amorphous state, affects state recognition and shortens the memory's lifetime due to frequent refresh operations.
Innovation Solution
A control device and method that classify memory cells into groups based on erase count and corresponding recovery times, performing bit recovery operations selectively on each group to reduce the number of recovery operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If frequent refresh operations are performed to correct resistance value drift, then the accuracy of state recognition is improved, but the lifetime of the phase change memory is shortened
Solution Approach 1:
The memory cells are segmented into multiple groups based on their erase counts and assigned different recovery times. This segmentation allows each group to undergo refresh operations at optimized intervals, preventing both excessive refreshes that would shorten lifetime and insufficient refreshes that would compromise accuracy.
Solution Approach 2:
The patent implements dynamic recovery time management where the recovery time for different memory cell groups varies based on their operational history (erase counts). This dynamic approach optimizes the balance between maintaining state recognition accuracy and extending memory lifetime by tailoring refresh intervals to individual cell conditions.
2Measurement precision
If uniform refresh operations are performed on all memory cells, then the state recognition accuracy is maintained, but the wear on memory cells increases unnecessarily
Solution Approach 1:
Different memory cell groups are assigned different recovery times based on their specific wear levels and operational histories. This local quality approach ensures that each group receives refresh operations at the minimum necessary frequency to maintain accuracy, thereby avoiding unnecessary wear on cells that don't require frequent refreshing.
Solution Approach 2:
The patent changes the refresh operation parameters (recovery time) based on the erase count and operational status of different memory cell groups. By adjusting these parameters dynamically, the system maintains state recognition accuracy while minimizing unnecessary refresh operations that would increase wear.
Data Source
AI summary
A control device, for controlling an operation of a memory device, wherein the memory device includes a plurality of memory blocks, each of the memory blocks includes a plurality of memory cells, and each of the memory cells stores a bit-data. The control device comprises the following elements. A processor, for classifying the memory cells into a plurality of groups according to an erase count of each of the memory cells, the groups respectively correspond to a plurality of recovery times. A memory interface control circuit, coupled to the processor and the memory device, and the processor controls the memory device to perform a bit recovery operation through the memory interface control circuit. The processor selects one of the groups according to the recovery times, and performs the bit recovery operation on the bit-data of each of the memory cells in the selected group.