Phase-Change Memory Reset Using Spike-Based Programming Pulses

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Solution Overview

Problem

Existing memory cell programming methods in 3D crosspoint memory arrays dissipate large amounts of energy and are slow due to the use of constant current for transitioning the phase change material from a crystalline to an amorphous state.

Innovation Solution

Implement spike-based programming that utilizes a large spike current to initiate the transition of the phase change material into an amorphous state, followed by a low-amplitude current to complete the programming, reducing energy dissipation and shortening the programming time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If constant current is used for programming memory cells, then the phase change material transitions from crystalline to amorphous state, but energy dissipation is large and programming speed is slow

Engineering Contradiction:
Improveenergy dissipationVSAvoidprogramming speed
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The patent applies periodic pulsed current instead of constant current for programming memory cells. A high-amplitude current pulse is applied for a short duration (5 ns or less) to initiate the phase transition, followed by a low-amplitude current to complete the programming. This periodic action reduces energy dissipation while maintaining fast programming speed, resolving the contradiction between energy efficiency and productivity.

Inventive Principle:
Principle #19Periodic action

2Speed

If high current is applied to transition phase change material to amorphous state, then programming speed improves, but energy dissipation increases

Engineering Contradiction:
Improveprogramming speedVSAvoidenergy expenditure
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent applies a high-amplitude current pulse first to initiate the phase transition of the phase change material from crystalline to amorphous state. This preliminary action creates the conditions for rapid state change, after which a much lower current is sufficient to complete the programming. This approach achieves fast programming speed while minimizing total energy expenditure.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The programming process uses a two-stage periodic current application: first a high-amplitude short-duration pulse to start the phase transition, then a low-amplitude current to finish the programming. This periodic action pattern enables fast programming speed with reduced energy consumption compared to continuous high current.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces energy expenditure and significantly improves programming speed by transitioning the phase change material from crystalline to amorphous in 5 ns or less, compared to 10-20 ns in traditional methods.

Implementation Method 1

a current spike and a programming pulse to the memory cell to cause the PM region to be placed into an amorphous state

Methodology Applied
Scientific EffectPhase change: Phase Change

Data Source

PatentUS12475945B2Spike based programming of a memory cell to reset state
Publication Date: 2025.11.18 INTEL CORP
  • US12475945B2 patent drawing
  • US12475945B2 patent drawing
  • US12475945B2 patent drawing

AI summary

A memory device comprising a plurality of memory cells, a memory cell of the plurality of memory cells comprising a phase change material (PM) region and a select device (SD) region in series with the PM region; a first address line and a second address line coupled to the memory cell; and memory controller circuitry to interface with the first address line and the second address line, the memory controller circuitry to encode a state in the memory cell by applying, through the first address line and second address line, a current spike and a programming pulse to the memory cell to cause the PM region to be placed into an amorphous state and the SD region of the memory cell to be placed into a high threshold voltage state.