Phase Change Memory Cell Self-Aligned Bottom Electrode

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Solution Overview

Problem

Existing methods for manufacturing high-density memory devices with phase change materials face challenges such as reliability and yield issues due to variations in critical dimensions and electrical integrity caused by lithographic processes, particularly in forming small electrodes and ensuring uniform contact areas, leading to inconsistent performance and connectivity problems.

Innovation Solution

A manufacturing process for phase change memory devices with self-aligned bottom electrodes, where the critical dimension of the contact area is converged within a small range independent of lithographic variations, using a separation layer and etch masks to compensate for size variations, resulting in a reliable and uniform memory cell structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If lithographic processes are used to form small electrodes, then high-density memory structure is achieved, but variations in critical dimensions and electrical integrity occur

Engineering Contradiction:
Improveelectrode sizeVSAvoidcritical dimension uniformity
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

A separation layer is introduced as an intermediary between the substrate and the memory cell structure. This separation layer has a specific thickness that compensates for lithographic variations, serving as a mediator that ensures uniform critical dimensions regardless of variations in the lithographic patterning process.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The thickness of the separation layer is carefully controlled and optimized to compensate for variations in the lithographic process. By adjusting this parameter, the patent achieves convergence of the critical dimension of the contact area within a small range, independent of lithographic variations.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If contact area is reduced to minimize reset current, then reset current magnitude is reduced, but reliability and yield issues arise due to variations in contact area

Engineering Contradiction:
Improvereset current magnitudeVSAvoidelectrical integrity
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The separation layer acts as a mediator that decouples the relationship between lithographic variations and contact area variations. By controlling the separation layer thickness, the patent ensures uniform contact areas between the bottom electrode and the phase change material, thereby maintaining electrical integrity while keeping the contact area small enough to minimize reset current.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If self-aligned bottom electrode is formed, then manufacturing precision is improved, but process complexity increases

Engineering Contradiction:
Improvealignment precisionVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple functions into the separation layer: it serves as both a structural element for alignment and a compensating element for lithographic variations. The self-aligned bottom electrode is formed by utilizing the separation layer as a reference, merging the alignment function with the existing separation layer structure rather than adding separate alignment features.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8143612B2Phase change memory cell in via array with self-aligned, self-converged bottom electrode and method for manufacturing
Publication Date: 2012.03.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8143612B2 patent drawing
  • US8143612B2 patent drawing
  • US8143612B2 patent drawing

AI summary

An array of “mushroom” style phase change memory cells is manufactured by forming a separation layer over an array of contacts, forming an isolation layer on the separation layer and forming an array of memory element openings in the isolation layer using a lithographic process. Etch masks are formed within the memory element openings by a process that compensates for variation in the size of the memory element openings that results from the lithographic process. The etch masks are used to etch through the separation layer to define an array of electrode openings. Electrode material is deposited within the electrode openings; and memory elements are formed within the memory element openings. The memory elements and bottom electrodes are self-aligned.