Phase Change Memory Weight Mapping for DNN Fault Tolerance

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Solution Overview

Problem

Deep Neural Networks (DNNs) face challenges with existing memory devices due to limited scalability, power leakage, and increased vulnerability to defects, especially with multi-bit phase change memory (PCM) devices that are prone to resistance drift, leading to data errors and reduced reliability.

Innovation Solution

A PCM-based memory device and method that analyzes the frequency of bit patterns in DNN weights, establishing a mapping relationship between bit patterns and resistance state levels, prioritizing bit patterns with higher stability for storage, thereby reducing errors and enhancing fault tolerance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-bit PCM is used to increase storage density, then data storage density is improved, but resistance drift vulnerability increases causing data errors

Engineering Contradiction:

Improvedata storage densityVSAvoiddata accuracy

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The patent performs preliminary analysis of bit pattern appearance rates before storing data in multi-bit PCM. By pre-calculating which bit patterns occur most frequently and mapping them to the most stable resistance states beforehand, the system proactively prevents data errors from resistance drift rather than reacting to them after they occur.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent changes the mapping relationship between bit patterns and resistance state levels based on the appearance rate parameter. By dynamically adjusting which bit patterns are assigned to which resistance states according to their frequency of occurrence, the system optimizes for both high storage density and high reliability simultaneously.

Inventive Principle:

Principle #35Parameter changes

2Use of energy by moving object

If multi-bit PCM is used for DNN weight storage, then energy consumption is reduced, but fault tolerance decreases due to resistance drift

Engineering Contradiction:

Improveenergy consumptionVSAvoidfault tolerance

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The patent changes the mapping parameter between bit patterns and resistance states based on appearance rate analysis. This optimization allows the system to maintain low energy consumption characteristics of multi-bit PCM while compensating for reliability issues through intelligent parameter selection.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent converts the harmful effect of resistance drift into a benefit by analyzing which bit patterns are most vulnerable and systematically mapping them to the most stable resistance states. This transforms the random harmful effect of resistance drift into a controlled situation where the most frequently used data patterns are protected against drift.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

3Productivity

If DNN complexity is increased to improve performance, then computational capability is improved, but memory resource requirements increase

Engineering Contradiction:

Improvecomputational capabilityVSAvoidmemory resource requirements

Core Design Contradiction:

ProductivityVSQuantity of substance

Solution Approach 1:

The patent makes the multi-bit PCM memory cell universal by enabling it to store not only data but also the mapping information between bit patterns and resistance states. This multi-functionality allows the same memory structure to handle both storage and optimization functions, reducing the need for separate control resources.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution maintains high reliability and fault tolerance for DNNs by minimizing data errors due to resistance drift, while reducing energy consumption and improving computational efficiency, making it suitable for diverse computing environments.

Implementation Method 1

PCM is a memory device that stores data using a phase change material (Ge2Sb2Te5: GST), and is known to be very suitable for DNN because it has high storage density, extendibility, and near-zero leakage power. PCM can distinguish stored data according to the level of resistance value that varies depending on the state of the changing phase.

Methodology Applied

Scientific EffectPhase change: Phase Change

Data Source

PatentUS20240161823A1Memory device based on phase change memory for deep neural network and method for storing weight thereof

Publication Date: 2024.05.16 UI (UNIVERSITY IND FOUNDATION) YONSEI UNIVERSITY

AI summary

The present disclosure provides a PCM-based memory device for DNN and a method for storing weights thereof, the device comprising: a cell array having a plurality of memory cells implemented with phase change memories (Multi-Level Cell-Phase Change Memory, hereinafter PCM) that each store multi-bit data according to a resistance state level including a resistance value among a plurality of resistance state levels; and a memory controller that stores multi-bit data in the memory cells by mapping each bit pattern and the resistance state level, according to an appearance rate for bit patterns of a plurality of weights included in a plurality of layers constituting a DNN (Deep Neural Network). According to the present disclosure, fault tolerance can be improved by reducing the frequency of data errors due to resistance drift phenomenon.