Phase Change Memory Cell Side Electrode Void Structure
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional phase change memory devices face limitations due to the weak top interface between phase change materials and side electrodes, which affects the reliability and uniformity of memory cells, particularly in achieving sublithographic dimensions for high-density memory devices.
Innovation Solution
The memory material is deposited onto both the bottom electrode and the side electrode, creating a memory cell structure with a dielectric layer and a side electrode that defines a void, allowing for a memory element in electrical contact with both electrodes, thereby enhancing the interface strength and reducing the reset current required for phase transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the phase change material element size is reduced to minimize reset current, then the reset current magnitude is reduced, but the manufacturing precision and uniformity deteriorate due to sublithographic dimensions
Solution Approach 1:
The patent transitions from planar 2D electrode contacts to a 3D configuration where the side electrode extends vertically along the phase change material pillar. This dimensional change allows the active contact area to be defined by the pillar diameter (sublithographic) while the electrode contact length is determined by the vertical extent of the side electrode, enabling precise control of reset current through small lateral dimensions without compromising manufacturing uniformity.
Solution Approach 2:
The side electrode is positioned specifically at the top portion of the phase change material pillar, creating a localized contact region. This local quality approach concentrates the current delivery to a specific area (the top of the pillar) where it is most effective for phase change, while the rest of the structure maintains dimensions suitable for manufacturing precision.
2Ease of manufacture
If standard integrated circuit manufacturing processes are used, then manufacturing ease is maintained, but the minimum feature size limits the ability to achieve sublithographic dimensions
Solution Approach 1:
The side electrode is formed before the phase change material pillar is created. This preliminary action allows the side electrode structure to be defined at a larger, more manufacturable dimension, and then the phase change material is deposited around it to create the final sublithographic pillar structure. This sequence enables standard manufacturing processes to create features smaller than the lithographic limit.
3Power
If the contact area between electrodes and phase change material is reduced, then higher current densities are achieved with small absolute current values, but the interface strength between electrode and phase change material deteriorates
Solution Approach 1:
The side electrode contact transitions from a planar interface to a vertical cylindrical interface along the pillar. This dimensional change increases the effective contact area through the vertical extent of the side electrode while maintaining a small lateral footprint. The result is sufficient interface strength for reliability while achieving the high current densities needed for low-magnitude reset currents.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the strength of the interface between the phase change material and the electrodes, enabling the manufacture of memory cells with small active regions using reliable and repeatable techniques, reducing the reset current magnitude and enhancing the reliability of phase change memory devices.
Implementation Method 1
Phase change based memory materials are widely used in read-write optical disks. These materials have at least two solid phases, including for example a generally amorphous solid phase and a generally crystalline solid phase.
Implementation Method 2
Current heats the material and causes transitions between the states.
Implementation Method 3
The generally amorphous state is characterized by higher resistivity than the generally crystalline state; this difference in resistance can be readily sensed to indicate data.
Data Source
AI summary
A memory cell includes a memory cell layer over a memory cell access layer. The memory cell access layer comprises a bottom electrode. The memory cell layer comprises a dielectric layer and a side electrode at least partially defining a void with a memory element therein. The memory element comprises a memory material switchable between electrical property states by the application of energy. The memory element is in electrical contact with the side electrode and with the bottom electrode. In some examples the memory element has a pillar shape with a generally constant lateral dimension with the side electrode and the dielectric layer surrounding and in contact with first and second portions of the memory element.


