Peak Detector Bias Circuit for RF Power Supply Rejection
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Solution Overview
Problem
Conventional RF peak detectors suffer from modulation effects due to varying peak voltages and poor power supply rejection ratio, especially when handling RF signals like OFDM, and are not suitable for power measurement due to their single-input design.
Innovation Solution
A peak detector design incorporating an input transistor, isolation transistor, load transistors, a buffer, a current source, and resistors, which biases the transistors to operate in specific regions to minimize modulation effects and provide high power supply rejection, allowing for multiple input voltage detection with shared circuitry for efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the load transistor operates in saturation region for large peak voltage, then the peak detection range is extended, but the I-V characteristic changes and degrades performance
Solution Approach 1:
The patent changes the operating parameter (operating region) of the load transistor from saturation to triode region. By biasing the load transistor in the triode region using a control voltage generated by the buffer amplifier and control transistor, the transistor maintains a more stable I-V characteristic across varying peak voltages, thus improving detection accuracy while preserving the extended detection range capability
2Adaptability or versatility
If the supply voltage varies, then the circuit operates under different conditions, but VDS of the input transistor varies resulting in poor power supply rejection ratio
Solution Approach 1:
The patent introduces an isolation transistor as an intermediary element between the input transistor and the load transistor. This isolation transistor, biased in the triode region, acts as a buffer that decouples the input transistor from supply voltage variations, preventing VDS modulation and improving the power supply rejection ratio while maintaining operational flexibility
3Device complexity
If a conventional RFPKD structure is used, then the circuit is simple, but it only has one input so that it is not suitable for power measurement
Solution Approach 1:
The patent enhances the universality of the peak detector by enabling it to handle multiple input signals and perform power measurement in addition to voltage peak detection. The extended circuit configuration with additional transistors and biasing networks allows the same core structure to serve multiple functions: detecting peak voltage of single or multiple inputs and calculating power, thus improving versatility without excessive complexity increase
Data Source
AI summary
A peak detector including an input transistor, an isolation transistor, at least one load transistor, a buffer, a control transistor, a current source and at least one resistor. The isolation transistor isolates the input and load transistors from the supply voltage for power supply rejection. The buffer, control transistor, current source and resistor(s) bias the input transistor to remain in a saturation region and each load transistor to remain in a triode region. The buffer may be a unity gain buffer. The control transistor may match each load transistor with matching threshold voltages. An input bias circuit may be included to bias an input node to a direct-current voltage. The load transistor(s) may be biased to have so that the output voltage is proportional to a peak voltage of the input node. The peak detector may be configured to detect multiple inputs and may have shared circuitry.