Per-Row Memory Error Storage for Post-Package Repair

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Solution Overview

Problem

Existing semiconductor memory devices lack comprehensive error correction and post-package repair recommendations, leading to inefficiencies and potential safety issues due to unmanaged errors and the limited availability of redundant rows and columns.

Innovation Solution

Implementing a system to store per-row error information, including baseline and recent error data, and using an ECS circuit to analyze this information to provide post-package repair recommendations based on threshold comparisons and error trends.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction circuits periodically scan every memory cell to repair errors, then information fidelity is improved, but device complexity and operational overhead increase

Engineering Contradiction:
Improveinformation fidelityVSAvoidoperational overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the memory array into multiple banks, with each bank independently monitored by error correction circuits. This allows parallel error detection and correction across different memory sections, improving overall reliability while distributing the operational overhead across multiple smaller units rather than requiring a single comprehensive scan of the entire memory array.

Inventive Principle:
Principle #1Segmentation

2Reliability

If redundant rows and columns are used for post-package repair, then reliability is improved, but the available capacity for data storage is reduced

Engineering Contradiction:
Improvepost-package repair capabilityVSAvoiddata storage capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent implements preliminary mapping during manufacturing where redundant rows and columns are pre-designated and mapped to specific memory locations. This preliminary action allows the memory device to be configured with repair capabilities before deployment, ensuring that redundant resources are efficiently allocated and do not unnecessarily reduce usable storage capacity during normal operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs parameter changes by dynamically adjusting the mapping between logical address spaces and physical memory locations. When errors are detected, the system changes the addressing parameters to redirect access to redundant rows or columns, thereby maintaining full data storage capacity while providing repair functionality through parameter transformation rather than physical redundancy.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If comprehensive error information is stored for each row, then measurement precision is improved, but device complexity and memory overhead increase

Engineering Contradiction:
Improveerror information accuracyVSAvoidmemory overhead
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts only the essential error information parameters needed for post-package repair decisions, such as error counts and syndromes, rather than storing complete error logs for each row. This extraction approach maintains measurement precision for repair-critical data while significantly reducing the memory overhead and complexity associated with storing comprehensive error information.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements partial monitoring by focusing error information collection on specific rows or memory banks that exhibit error patterns, rather than uniformly monitoring all rows. This partial action approach provides sufficient measurement precision for repair decisions while reducing the overall memory overhead and complexity by avoiding redundant data collection from error-free regions.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12400728B2Apparatuses, systems, and methods for storing error information and providing recommendations based on same
Publication Date: 2025.08.26 MICRON TECHNOLOGY INC
  • US12400728B2 patent drawing
  • US12400728B2 patent drawing
  • US12400728B2 patent drawing

AI summary

Per-row recent and/or baseline error information for word lines may be stored along the word lines in some examples. In some examples, baseline error information may be stored in a fuse array. In some examples, the baseline error information may be loaded from the fuse array to a memory array. In some examples, based on the recent and/or baseline error information, the memory device may provide a post-package repair recommendation.