Peripheral Memory Placement on Substrate for Enhanced Capacity
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Solution Overview
Problem
Current microelectronic package substrates face limitations in increasing memory capacity for computing devices without significant design changes or impacting signal integrity and power delivery.
Innovation Solution
The method involves attaching a die on a board with a substrate that includes a central memory device and additional memory devices on its peripheral regions, not overlapping with the die, to create a package structure that supports enhanced memory capacity while maintaining efficient power delivery and signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If additional memory devices are attached on peripheral regions of the substrate not overlapping with the die, then memory capacity is enhanced, but device complexity increases
Solution Approach 1:
The substrate is divided into a central region (overlapping with die footprint) and peripheral regions (non-overlapping with die footprint). Memory devices are segmented and placed in these distinct regions, allowing independent attachment and routing. This segmentation enables enhanced memory capacity while maintaining manageable device complexity through modular organization.
Solution Approach 2:
The patent utilizes the substrate's planar dimensions by placing memory devices in peripheral regions that extend beyond the die footprint. This dimensional expansion allows additional memory capacity to be added without increasing vertical height or requiring complex 3D stacking, thereby enhancing capacity while controlling structural complexity.
2Reliability
If memory devices are placed in peripheral regions separate from the die, then signal integrity is maintained, but manufacturing precision requirements increase
Solution Approach 1:
The package structure is segmented into distinct functional zones: the central region containing the die and its associated memory devices, and peripheral regions containing additional memory devices. This segmentation creates clear separation between signal-critical areas and memory expansion areas, maintaining signal integrity while establishing well-defined attachment zones that simplify alignment requirements.
Solution Approach 2:
The substrate acts as an intermediary platform that provides standardized attachment interfaces and routing pathways. By mediating between the die and peripheral memory devices, the substrate establishes controlled signal paths and power delivery networks that maintain signal integrity while accommodating precise attachment of multiple memory devices in peripheral regions.
Data Source
AI summary
Methods of forming microelectronic package structures, and structures formed thereby, are described. Those methods/structures may include attaching a die on a board,attaching a substrate on the die, wherein the substrate comprises a first region and a peripheral region,attaching a first memory device on the central region of the substrate, andattaching at least one additional memory device on the peripheral region of the substrate, wherein the at least one additional memory device is not disposed over the die.