Perpendicular SCR Trigger and Discharge Paths

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Solution Overview

Problem

FinFET transistors are susceptible to damage from high ESD currents due to extreme heating, which can permanently damage the gate oxide and N+ region, and they are not ideal for discharge devices despite being suitable for triggering due to their small size and high turn-on resistance.

Innovation Solution

Implementing a Silicon-Controlled Rectifier (SCR) structure with FinFET devices aligned in a horizontal direction for triggering and vertical substrate-based discharge paths, allowing perpendicular current flow to prevent overheating of FinFET fins, and optimizing trigger and discharge currents separately to achieve low turn-on resistance without harming the FinFET transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If FinFET transistors are used for ESD discharge devices, then device size is reduced and power consumption is lowered, but the transistors are damaged by extreme heating from high ESD currents

Engineering Contradiction:
Improvedevice sizeVSAvoidtransistor reliability under ESD current
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The ESD protection circuit is segmented into two distinct functional paths: a trigger path using FinFET transistors and a discharge path using a separate SCR structure. This segmentation allows each component to be optimized for its specific function, preventing the FinFET from being damaged by high discharge currents while still benefiting from its size and power advantages in the trigger function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The SCR structure acts as an intermediary between the FinFET trigger and the high-current ESD discharge path. The FinFET triggers the SCR, which then handles the high-current discharge, protecting the FinFET from direct exposure to damaging ESD currents while enabling effective ESD protection.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If high ESD currents are shunted through FinFET transistors, then ESD protection is provided, but extreme heating damages the gate oxide and N+ region

Engineering Contradiction:
ImproveESD protection capabilityVSAvoidtransistor temperature under ESD current
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The current paths are segmented into trigger and discharge paths. The discharge path is routed through the SCR structure which is designed to handle high currents, while the FinFET trigger path handles only the small trigger current, preventing excessive heating in the FinFET.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The harmful high-current discharge function is extracted from the FinFET transistor and placed into a dedicated SCR discharge structure. This extraction removes the source of extreme heating from the FinFET while preserving the ESD protection function.

Inventive Principle:
Principle #2Taking out (Extraction)

3Device complexity

If trigger and discharge functions are combined in a single transistor, then device complexity is reduced, but the transistor cannot simultaneously optimize for both low power and high current handling

Engineering Contradiction:
Improvetransistor structure complexityVSAvoiddual function optimization capability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The ESD protection device is segmented into distinct trigger and discharge components with separate current paths. This allows each component to be independently optimized for its specific function while working together as an integrated ESD protection system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The SCR structure serves multiple functions: it acts as the discharge device for high-current ESD events and also provides the trigger mechanism through its internal transistor. This multi-functionality reduces the need for separate components while maintaining optimization for both low-power triggering and high-current discharge.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively protects FinFET devices from ESD damage by separating trigger and discharge current paths, ensuring low resistance and fast triggering while preventing overheating, thus enhancing the reliability of ESD protection circuits in both FinFET and planar processes.

Implementation Method 1

Implementing a Silicon-Controlled Rectifier (SCR) structure with FinFET devices aligned in a horizontal direction for triggering and vertical substrate-based discharge paths, allowing perpendicular current flow to prevent overheating of FinFET fins

Methodology Applied
Scientific EffectCurrent flow separation:

Implementation Method 2

Gate 52 is formed around the channel connecting region. Rather than being flat, gate 52 has an inverted U-shape that surrounds the channel connecting region between N+ regions 42, 44.

Methodology Applied
Scientific EffectGate control effect:

Data Source

PatentUS11302689B1Transistor-injected silicon-controlled rectifier (SCR) with perpendicular trigger and discharge paths
Publication Date: 2022.04.12 HONG KONG APPLIED SCI & TECH RES INST
  • US11302689B1 patent drawing
  • US11302689B1 patent drawing
  • US11302689B1 patent drawing

AI summary

An Electro-Static-Discharge (ESD) protection circuit has a Silicon-Controlled Rectifier (SCR) with a discharge current path in a first direction. A triggering transistor has a trigger current flowing in a second direction that is perpendicular to the first direction. Triggering transistors can be Fin Field-Effect Transistor (FinFET) transistors with current flowing along the long direction of the fins. The trigger current flows into a connecting N+ drain and into an N-Well under a center portion of the connecting N+ drain to inject carriers into the N-base of a PNPN SCR. The injected current flows through the base to generate a voltage gradient that turns on the PN junction in a P+ emitter that is parallel to but spaced apart from the FinFET transistors, causing a discharge current to flow perpendicular to the fins. The perpendicular discharge current flows through the substrate which can handle a larger current than the small fins.