Persistent Memory Relative Mapping with Floating Offset Metadata
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Solution Overview
Problem
Current persistent memory solutions, such as NVDIMM-N, Intel's Optane DC Persistent Memory, and software defined persistent memory, require the memory map of the information handling system to be consistent between boots, leading to data loss and system instability due to changes in memory configuration, such as adding or removing memory modules or DIMM failures.
Innovation Solution
Implementing a floating memory offset value in the metadata region of the persistent memory to describe its location within the system memory map, allowing the memory region to shift relative to the map without requiring a restore or sanitize operation, thus maintaining data integrity and system stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory map is kept consistent between boots, then persistent memory can be reliably mapped to prescribed memory regions, but the system cannot adapt to memory configuration changes such as adding or removing memory modules
Solution Approach 1:
The patent implements a dynamic memory mapping mechanism where the persistent memory region is no longer fixed to a specific physical address but instead is defined by a floating offset value stored in metadata. This offset can be recalculated and updated whenever memory configuration changes occur, allowing the system to adapt dynamically while maintaining reliable mapping through the use of relative positioning rather than absolute addresses
Solution Approach 2:
The patent changes the parameter used for memory mapping from fixed physical addresses to relative offsets stored in metadata. By storing the persistent memory region definition as a floating offset value rather than a static address, the system can adjust the mapping parameters whenever memory configuration changes, thus maintaining reliability without sacrificing adaptability
2Adaptability or versatility
If the memory map changes between boots, then the system can adapt to memory configuration changes, but the persistent memory can no longer be mapped to the prescribed memory region resulting in data loss
Solution Approach 1:
The patent introduces metadata as an intermediary layer between the physical memory configuration and the persistent memory mapping. The metadata stores the floating offset value that defines the persistent memory region's location relative to the system memory map. This intermediary allows the system to handle memory map changes without losing persistent memory data, as the offset can be recalculated based on the new configuration while the actual data remains intact in the persistent memory region
3Productivity
If memory is added or removed from the server, then memory capacity can be optimized, but the persistent memory feature becomes unavailable requiring restore or sanitize operations
Solution Approach 1:
The patent enables dynamic recalculation of the persistent memory region's floating offset value when memory capacity changes occur. Instead of requiring restore or sanitize operations, the system simply updates the offset in metadata to reflect the new memory configuration, allowing persistent memory to remain available and functional while accommodating memory capacity optimization
Solution Approach 2:
The patent allows the system to change the offset parameter in metadata when memory configuration changes, rather than requiring restoration of the entire persistent memory feature. This parameter change approach enables memory capacity optimization while maintaining persistent memory availability, as only the mapping parameter needs adjustment rather than the entire memory region
Data Source
AI summary
An information handling system may include a processor, a persistent memory, and a basic input/output system communicatively coupled to the processor and configured to write to a metadata region stored on the persistent memory a floating memory offset value to describe a memory region of the persistent memory as a relative location within a system memory map for the information handling system.