pFET Gate Work-Function Stack With Al-C Layer for Lower Threshold Voltage
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Solution Overview
Problem
Existing technologies face challenges in effectively tuning the work function of p-type transistors in FinFETs and Gate-All-Around (GAA) transistors, particularly in the formation of replacement gates, which affects the threshold voltage and performance.
Innovation Solution
The introduction of an aluminum-and-carbon containing work-function layer is inserted between the high-k dielectric layer and the p-type work-function layer, enhancing the overall work function and reducing the threshold voltage of p-type transistors by forming dipoles with the high-k gate dielectric layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a p-type work-function layer (e.g., TiN) is used in the replacement gate, then the transistor structure is formed, but the threshold voltage is too high and performance is degraded
Solution Approach 1:
The work-function layer is segmented into multiple distinct layers: an n-type work-function layer (first work-function layer) and a p-type work-function layer (second work-function layer). This segmentation allows independent optimization of each layer's properties, enabling precise control of the overall work function to achieve desired threshold voltage while maintaining transistor performance.
Solution Approach 2:
The patent changes the work function parameter by introducing an n-type work-function layer with a lower work function (4.0-4.5 eV) beneath the p-type work-function layer. By adjusting the thickness and material composition of these layers, the overall effective work function is tuned to reduce threshold voltage by up to 250 mV, directly addressing the threshold voltage control issue.
2Ease of manufacture
If the work function of the gate is increased to reduce threshold voltage, then threshold voltage decreases, but the work-function layer configuration becomes more complex
Solution Approach 1:
The n-type work-function layer acts as an intermediary layer between the high-k dielectric and the p-type work-function layer. This intermediary layer with intermediate work function (4.0-4.5 eV) mediates the electrical properties, enabling threshold voltage reduction without requiring extreme changes to the p-type layer, thus simplifying the overall configuration while achieving the desired effect.
Solution Approach 2:
The gate structure employs a composite work-function layer configuration combining n-type material (e.g., Al, AlC) and p-type material (e.g., TiN, TaN). This composite structure leverages the complementary properties of both materials to achieve optimized work function and threshold voltage control, balancing performance improvement with manageable structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a significant reduction of the threshold voltage by up to 250 mV, improving the performance of p-type transistors by optimizing the work function through the interaction between the carbon atoms and high-k gate dielectric layer.
Implementation Method 1
enhancing the overall work function and reducing the threshold voltage of p-type transistors by forming dipoles with the high-k gate dielectric layer
Data Source
AI summary
A method includes forming a dummy gate stack over a semiconductor region, forming a source/drain region on a side of the dummy gate stack, removing the dummy gate stack to form a trench, with the semiconductor region being exposed to the trench, forming a gate dielectric layer extending into the trench, and depositing a work-function tuning layer on the gate dielectric layer. The work-function tuning layer comprises aluminum and carbon. The method further includes depositing a p-type work-function layer over the work-function tuning layer, and performing a planarization process to remove excess portions of the p-type work-function layer, the work-function tuning layer, and the gate dielectric layer to form a gate stack.