PFET Power Switch With Level Shifting for Safe High-Voltage Operation
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Solution Overview
Problem
Existing power voltage switches in integrated circuits (ICs) include low voltage transistors that operate outside their safe operating area (SOA), leading to potential damage or degradation, particularly in resistive random access memory (RRAM) applications.
Innovation Solution
A high voltage power switch design incorporating P-type field effect transistors (PFETs) with integrated level shifters and voltage selection circuits, ensuring that voltage levels do not exceed the maximum rating of the transistors, thereby maintaining operation within the safe operating area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If low voltage transistors are used in power voltage switch designs to reduce power consumption, then power consumption is reduced, but the transistors may operate outside their safe operating area which may damage or degrade the operation of the low power transistors
Solution Approach 1:
A level shifter circuit is introduced as an intermediary component between the control logic and the low voltage transistor gate. The level shifter translates control signals to appropriate voltage levels that keep the transistor within its safe operating area while maintaining low power consumption. This mediator prevents direct application of high voltages to the transistor gate that would push it outside SOA.
Solution Approach 2:
The patent dynamically adjusts voltage parameters applied to the transistor gate through the level shifter. By changing the voltage level parameters based on operating conditions, the transistor is kept within its safe operating area across different power modes while maintaining optimal performance and low power consumption.
2Adaptability or versatility
If high voltage is applied to output different voltage levels in RRAM applications, then voltage switching capability is achieved, but the low voltage transistors may be damaged or degraded
Solution Approach 1:
The voltage switching function is segmented into two separate components: the level shifter handles high voltage translation for adaptability, while the low voltage transistor handles power switching within its safe operating area. This segmentation allows the system to achieve high voltage switching capability without exposing the transistor to damaging voltage levels.
Solution Approach 2:
The level shifter acts as a protective intermediary that absorbs the high voltage stress required for RRAM voltage switching. It translates these high voltage requirements into safe control signals for the low voltage transistor, enabling voltage adaptability while protecting transistor durability.
3Ease of operation
If conventional power voltage switch designs are used, then voltage switching is achieved, but the IC area occupied is larger than necessary
Solution Approach 1:
The level shifter and power switching transistor are merged into a single integrated power voltage switch unit. This consolidation achieves the voltage switching function in a compact configuration that occupies less IC area compared to conventional designs that use separate components for voltage translation and power switching.
Data Source
AI summary
A power switch, including: a PFET including a gate, a source coupled to a source voltage, and a drain for outputting a supply voltage; and a level shifter, wherein the level shifter includes: an input node for receiving an input voltage, wherein the input voltage includes first and second voltage levels; a supply node for receiving the supply voltage, wherein the supply voltage includes third and fourth voltage levels; and an output node for outputting an output voltage, wherein the output node is coupled to the gate of the PFET; wherein, when the input voltage is at the first voltage level, the output voltage is at the first voltage level and the PFET is in a conducting state; and wherein a voltage between the gate and drain of the PFET and a voltage between the gate and source of the FET do not exceed a maximum voltage of the PFET.