Programmable Gain Amplifier Resistor Network for Wide Gain Range
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Solution Overview
Problem
Existing programmable gain amplifier (PGA) designs require large areas and offer poor performance to achieve a wide range of selectable gain, with high power consumption and thermal noise due to the need for large equivalent resistance in resistor networks.
Innovation Solution
A resistor network is used in a feedback loop with reduced equivalent resistance, comprising multiple resistors in series and parallel configurations, which reduces the number of critical matching devices and thermal noise, while allowing for smaller die area and lower power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If large equivalent resistance is used in the resistor network to achieve wide gain range, then gain selection range is improved, but die area increases and power consumption increases
Solution Approach 1:
The resistor network is segmented into multiple discrete resistor units (R1, R2, R3, R4, R5, R6) that can be independently switched into the circuit. This segmentation allows the PGA to achieve multiple gain values by selectively connecting different combinations of resistor units, thereby providing wide gain range without requiring a single large equivalent resistance that would consume excessive die area.
Solution Approach 2:
The resistor network incorporates switching mechanisms that dynamically reconfigure the connections between resistor units based on the desired gain value. This dynamic reconfiguration allows the same physical resistor units to serve multiple functions across different gain settings, achieving adaptability without proportionally increasing die area.
2Adaptability or versatility
If large equivalent resistance is used in the resistor network to achieve wide gain range, then gain selection range is improved, but power consumption increases
Solution Approach 1:
By segmenting the resistor network into switchable units, the system can achieve wide gain range while keeping individual resistor values and their associated power consumptions low. Only the necessary subset of resistor units is activated for each gain setting, reducing total power consumption compared to a design requiring all resistors to be continuously active.
Solution Approach 2:
The switching mechanism allows unused resistor units to be effectively 'discarded' from the active circuit path for each particular gain setting, reducing unnecessary power consumption. When gain settings change, previously unused units may be 'recovered' and put into service, optimizing power efficiency across the full gain range.
3Adaptability or versatility
If more resistors are used in the resistor network to achieve wide gain range, then gain selection range is improved, but CMRR performance deteriorates due to increased matching complexity
Solution Approach 1:
The resistor network is divided into segmented units that can be independently matched and calibrated. This segmentation reduces the overall matching complexity compared to a single large-resistance network, as each unit can be designed with standardized values and switched combinations, thereby maintaining CMRR performance while achieving wide gain range.
4Adaptability or versatility
If large equivalent resistance is used in the resistor network, then gain range is improved, but thermal noise increases
Solution Approach 1:
By using multiple smaller resistor units switched in series/parallel combinations rather than a single large resistance, the network achieves wide gain range while keeping individual resistor values low. Since thermal noise is proportional to resistance value, this segmentation approach reduces overall thermal noise generation while maintaining the required gain range.
Data Source
AI summary
A programmable gain amplifier includes an operational amplifier and a resistor network coupled to the output node of the operational amplifier. The resistor network includes a first plurality of resistors coupled in series between the output node and a first network node. A second plurality of resistors is coupled in series between the first network node and a second network node. A unit resistor is coupled in parallel with the second plurality of resistors between the first and second resistor network nodes and a third plurality of resistors is coupled in parallel between the second resistor network node and a reference voltage. Each resistor of the second and third pluralities of resistors comprises a unit resistor. The third plurality of resistors contains N resistors and the second plurality of resistors contains (N−1) resistors.


